Xcvr_rx_sd_threshold, Xcvr_tx_common_mode_voltage – Altera Transceiver PHY IP Core User Manual
Page 614
Options
0–16
Assign To
Pin - RX serial data
XCVR_RX_SD_THRESHOLD
Pin Planner and Assignment Editor Name
Receiver Signal Detection Voltage Threshold
Description
Specifies signal detection voltage threshold level, V
th
. The following encodings are defined:
• SDLV_50MV=7
• SDLV_45MV=6
• SDLV_40MV=5
• SDLV_35MV=4
• SDLV_30MV=3
• SDLV_25MV=2
• SDLV_20MV=1
• SDLV_15MV=0
For the PCIe PIPE PHY, SATA, and SAS.
The signal detect output is high when the receiver peak-to-peak differential voltage (diff p-p) > V
th
x 4.
For example, a setting of 6 translates to peak-to-peak differential voltage of 180mV (4*45mV). The V
diff p-
p
must be > 180mV to turn on the signal detect circuit.
Options
• 0-7
Assign To
Pin - RX serial data
XCVR_TX_COMMON_MODE_VOLTAGE
Pin Planner and Assignment Editor Name
Transmitter Common Mode Driver Voltage
Description
Transmitter common-mode driver voltage.
Note: Contact Altera for using this assignment.
Related Information
19-20
XCVR_RX_SD_THRESHOLD
UG-01080
2015.01.19
Altera Corporation
Analog Parameters Set Using QSF Assignments