Altera Transceiver PHY IP Core - Manual (Page 106)

7. Create a MIF for each configuration and associate each MIF with a ROM created in Step 6. For
example, create a MIF for 1G with 1588 , a MIF for 10G with 1588, and a MIF for AN/LT. AN/LT MIF
is is used to reconfigure the PHY into low latency mode during AN/LT. These MIFs are the three
configurations used in the MIF streaming process. The example design contains five required MIFs
(1G, 10G, 1G with 1588,10G with 1588 and AN/LT). Altera recommends that you use these MIFs even
if you are not using the example design.
8. Generate a fractional PLL to create the 156.25 MHz XGMII clock from the 10G reference clock.
9. Instantiate the PHY in your design based on the required number of channels.
10.To complete the system, connect all the blocks.
Related Information
MIF Generation on page 16-37
Editing a 10GBASE-KR MIF File
This topic shows how to edit a 10GBASE-KR MIF file to change between 1G and 10Gb Ethernet.
The MIF format contains all bit settings for the transceiver PMA and PCS. Because the 10GBASE-KR
PHY IP Core only requires PCS reconfiguration for a rate change, the PMA settings should not change.
Removing the PMA settings from the MIF file also prevents an unintended overwrite of PMA parameters
set through other assignments. A few simple edits to the MIF file removes the PMA settings. Complete the
following steps to to remove PMA settings from the MIF file:
1. Replace line 17 with
"13: 0001000000010110; -- PMA - RX changed to removed CTLE".
2. Replace line 20 with
"16: 0010100000011001; -- PMA - RX continued".
3. Replace line 4 with
"4: 0001000000000000; -- PMA - TX"
.
4. Remove lines 7-10. These lines contain the TX settings (V
OD
, post-tap, pre-tap).
5. Renumber the lines starting with the old line 11.
6. Change the depth at the top of the file from 168 to 164.
4-50 Editing a 10GBASE-KR MIF File
UG-01080
2015.01.19
Altera Corporation Backplane Ethernet 10GBASE-KR PHY IP Core with Early Access FEC Option
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