Altera Transceiver PHY IP Core - Manual (Page 363)

Name Direction Description
rx_10g_fifo_full
[-1:0]
Output Active high RX FIFO full flag. Synchronous to
rx_10g_
clkout
. This signal is pulse-stretched; you must use a
synchronizer.
rx_10g_fifo_pfull
[-1:0]
Output RX FIFO partially full flag. Synchronous to
rx_10g_
clkout
. This signal is pulse-stretched; you must use a
synchronizer.
rx_10g_fifo_empty
[-1:0]
Output Active high RX FIFO empty flag. Synchronous to
rx_
10g_coreclkin
.
rx_10g_fifo_pempty
[-1:0]
Output Active high. RX FIFO partially empty flag. Synchronous
to
rx_10g_coreclkin
.
rx_10g_fifo_align_clr
[-1:0]
Input For the Interlaken protocol, this signal clears the current
word alignment when the RX FIFO acts as a deskew
FIFO. When it is asserted, the RX FIFO is reset and
searches for a new alignment pattern. Synchronous to
rx_
10g_coreclkin
.
rx_10g_fifo_align_en
[-1:0]
Input For the Interlaken protocol, you must assert this signal to
enable the RX FIFO for alignment. Synchronous to
rx_
10g_coreclkin
.
rx_10g_align_val
[-1:0]
Output For the Interlaken protocol, an active high indication that
the alignment pattern has been found. Synchronous to
rx_10g_coreclkin
.
Rx_10g_fifo_del
[-1:0]
Output When asserted, indicates that a word has been deleted
from the TX FIFO. This signal is used for the 10GBASE-R
protocol. This signal is pulse-stretched; you must use a
synchronizer. Synchronous to
rx_10g_clkout
.
Rx_10g_fifo_insert
[-1:0]
Output Active-high 10G BaseR RX FIFO insertion flag. Synchro‐
nous to
rx_10g_coreclkin
.
When asserted, indicates that a word has been inserted
into the TX FIFO. This signal is used for the 10GBASE-R
protocol.
CRC32
rx_10g_crc32err
[-1:0]
Output For the Interlaken protocol, asserted to indicate that the
CRC32 Checker has found a CRC32 error in the current
metaframe. Is is asserted at the end of current metaframe.
This signal is pulse-stretched; you must use a synchron‐
izer. Synchronous to
rx_10g_clkout
.
Frame Generator
UG-01080
2015.01.19
10G PCS Interface 12-65
Stratix V Transceiver Native PHY IP Core Altera Corporation
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