Altera Transceiver PHY IP Core - Manual (Page 417)

PMA Parameters for Arria V GZ Native PHY
This section describes the PMA parameters for the Arria V GZ native PHY.
Table 14-3: PMA Options
The following table describes the options available for the PMA. For more information about the PMA, refer to
the PMA Architecture section in the Transceiver Architecture in Arria V GZ Devices.
Some parameters have ranges where the value is specified as Device Dependent. For such parameters, the possible
range of frequencies and bandwidths depends on the device, speed grade, and other design characteristics. Refer
to the Arria V GZ Device Datasheet for specific data for Arria V GZ devices.
Parameter Range Description
Data rate Device Dependent Specifies the data rate.
TX local clock division factor 1, 2, 4, 8
Specifies the value of the divider available in the
transceiver channels to divide the input clock to
generate the correct frequencies for the parallel and
serial clocks.
TX PLL base data rate Device Dependent Specifies the base data rate for the clock input to the
TX PLL. Select a base data rate that minimizes the
number of PLLs required to generate all the clocks
required for data transmission. By selecting an
appropriate base data rate, you can change data rates
by changing the divider used by the clock generation
block.
PLL base data rate Device Dependent Shows the base data rate of the clock input to the TX
PLL. The PLL base data rate is computed from the
TX local clock division factor multiplied by the data
rate.
Select a PLL base data rate that minimizes the
number of PLLs required to generate all the clocks for
data transmission. By selecting an appropriate PLL
base data rate, you can change data rates by changing
the TX local clock division factor used by the clock
generation block.
14-6 PMA Parameters for Arria V GZ Native PHY
UG-01080
2015.01.19
Altera Corporation Arria V GZ Transceiver Native PHY IP Core
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