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Altera Transceiver PHY IP Core User Manual

Page 673

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Chapter

Document

Version

Changes Made

Stratix V Transceiver

Native PHY IP Core

2.5

Made the following changes:
• Corrected Figure 12-4 showing the 10G PCS datapath. This

datapath does not include hard IP blocks to implement KR-FEC.

• Corrected errors in Standard PCS Pattern Generators section.

• Updated the description of Number of TX PLLs parameter in

"TX PMA Parameters" table.

• Updated the description of Selected Clock Network parameter

in "TX PLL Parameters" table.

• Added a note related to auto-negotiation state machine in Rate

Match FIFO Parameters section.

• Updated the description of

rx_std_bitslip

signal.

• Added information on PRBS-8 Standard PCS pattern generator.

Arria V Transceiver

Native PHY IP Core

2.5

Made the following changes:
• Updated the description of Number of TX PLLs parameter in

"TX PMA Parameters" table.

• Updated the description of Selected Clock Network parameter

in "TX PLL Parameters" table.

• Added a note related to auto-negotiation state machine in Rate

Match FIFO Parameters section.

• Updated the description of

rx_std_bitslip

signal.

• Updated the table for "Signal Definitions for rx_parallel_data

with and without 8B/10B Encoding".

Arria V GZ

Transceiver Native

PHY IP Core

2.5

Made the following changes:
• Updated the description of Number of TX PLLs parameter in

"TX PMA Parameters" table.

• Updated the description of Selected Clock Network parameter

in "TX PLL Parameters" table.

• Updated the table for "Signal Definitions for rx_parallel_data

with and without 8B/10B Encoding".

• Added a note related to auto-negotiation state machine in Rate

Match FIFO Parameters section.

• Updated the description of

rx_std_bitslip

signal.

Cyclone V

Transceiver Native

PHY IP Core

2.5

Made the following changes:
• Updated the description of Number of TX PLLs parameter in

"TX PMA Parameters" table.

• Updated the description of Selected Clock Network parameter

in "TX PLL Parameters" table.

• Added a note related to auto-negotiation state machine in Rate

Match FIFO Parameters section.

UG-01080

2015.01.19

Revision History for Previous Releases of the Transceiver PHY IP Core

21-13

Additional Information for the Transceiver PHY IP Core

Altera Corporation

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