Altera Transceiver PHY IP Core User Manual
Page 19
File Name
Description
sv_xcvr_native.sv
Defines the transceiver. It includes instantiations of
the PCS and PMA modules and Avalon-MM PHY
management interface.
stratixv_hssi_
These files perform rule based checking for the
module specified. For example, if the PLL type, data
rate, and FPGA fabric transceiver interface width
are not compatible, the checker reports an error.
altera_wait_generate.v
Generates waitrequest for protocol-specific
transceiver PHY IP core that includes backpressure.
alt_reset_ctrl_tgx_cdrauto.sv
Includes the reset controller logic.
Includes an example of the PLL_TYPE assignment
statement required to specify the PLL type for each
PLL in the design. The available types are clock
multiplier unit (CMU) and auxiliary transmit
(ATX).
The simulation directory.
Simulation files for Riviera-PRO simulation tools.
Simulation files for Cadence simulation tools.
Simulation files for Mentor simulation tools.
Simulation files for Synopsys simulation tools.
The Verilog and VHDL transceiver PHY IP cores have been tested with the following simulators:
• ModelSim SE
• Synopsys VCS MX
• Cadence NCSim
If you select VHDL for your transceiver PHY, only the wrapper generated by the Quartus II software is in
VHDL. All the underlying files are written in Verilog or System Verilog. To enable simulation using a
VHDL-only ModelSim license, the underlying Verilog and System Verilog files for the transceiver PHY
are encrypted so that they can be used with the top-level VHDL wrapper without using a mixed-language
simulator.
For more information about simulating with ModelSim, refer to the Mentor Graphics ModelSim Support
chapter in volume 3 of the Quartus II Handbook.
The transceiver PHY IP cores do not support the NativeLink feature in the Quartus II software.
Generating Custom Simulation Scripts for Multiple Transceiver PHYs with ip-make-simscript
Use the
ip-make-simscript
utility to generate simulation command scripts for multiple transceiver
PHYs or Qsys systems. Specify all Simulation Package Descriptor files (.spd). The .spd files list the
required simulation files for the corresponding IP core. The MegaWizard Plug-In Manager and Qsys
generate the .spd files.
1-8
Running a Simulation Testbench
UG-01080
2015.01.19
Altera Corporation
Introduction to the Protocol-Specific and Native Transceiver PHYs