Altera Transceiver PHY IP Core - Manual (Page 523)

Parameterizing the Transceiver Reconfiguration Controller IP Core in
Qsys
Complete the following steps to configure the Transceiver Reconfiguration Controller IP Core in Qsys:
1. On the Project Settings tab, select Arria V, Arria V GZ, Cyclone V, or Stratix V from the list.
2. On the Component Library tab, type the following text string in the search box:
reconfig
. Qsys filters
the component library and shows all components matching the text string you entered.
3. Click Transceiver Reconfiguration Controller and then click +Add.
4. Select the options required for your design. For a description of these options, refer to the General
Options Parameters.
5. Click Finish to generate your customized Transceiver Reconfiguration Controller PHY IP Core.
General Options Parameters
This section lists the available options.
Table 16-4: General Options
Name Value Description
Device family
Arria V
Arria V GZ
Cyclone V
Stratix V
Specifies the device family. The reconfigura‐
tion functions available for Arria V and
Cyclone V devices are a subset of those
available for Stratix V devices. Refer to Device
Support for Dynamic Reconfiguration for
more information about available functions.
Interface Bundles
Number of reconfiguration
interfaces
<
IF
>
Specifies the total number of reconfiguration
interfaces that connect to the Transceiver
Reconfiguration Controller. There is one
interface for each channel and TX PLL.
When you specify the parameters for a
transceiver PHY, the message window
displays the number of interfaces required.
Optional interface grouping
<
Grp
1
>,<
Grp
2
>,
<
Grp
3
>
Specifies the grouping of reconfiguration
interfaces as a comma-separated list with each
integer indicating the total number of reconfi‐
guration interfaces that are connected to a
transceiver PHY instance. Leave this entry
blank if all reconfiguration interfaces connect
to the same transceiver PHY instance.
Refer to Understanding Logical Channel
Numbering for more information about
grouping interfaces.
16-6 Parameterizing the Transceiver Reconfiguration Controller IP Core in Qsys
UG-01080
2015.01.19
Altera Corporation Transceiver Reconfiguration Controller IP Core Overview
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