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Parameterizing the 10gbase-kr phy, Parameterizing the 10gbase-kr phy -4 – Altera Transceiver PHY IP Core User Manual

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The following table shows the typical expected resource utilization for selected configurations using the

current version of the Quartus II software targeting a Stratix V GT (5SGTMC7K2F40C2) device. The

numbers of ALMs and logic registers are rounded up to the nearest 100. Resource utilization numbers

reflect changes to the resource utilization reporting starting in the Quartus II software v14.1 release for 28

nm device families and upcoming device families.

Table 4-3: 10GBASE-KR PHY Performance and Resource Utilization

Module Options

ALMs

Logic Registers

Memory

10GBASE-KR PHY only, no AN or LT

400

700

0

10GBASE-KR PHY with AN and

Sequencer

1000

1700

0

10GBASE-KR PHY with LT and

Sequencer,

2100

2300

0

10GBASE-KR PHY with AN, LT, and

Sequencer

2700

3300

0

10GBASE-KR MIF, Port A depth 256,

width 16, ROM (For reconfiguration from

low latency or 1GbE mode)

0

0

1 (M20K)

Low Latency MIF, Port A depth 256, width

16, ROM (Required for auto-negotiation

and link training.)

0

0

1 (M20K)

10GBASE-KR PHY with FEC

3700

5100

40 (M20K)

Parameterizing the 10GBASE-KR PHY

The10GBASE-KR PHY IP Core is available for the Arria V GZ and Stratix V device families. The IP

variant allows you specify either the Backplane-KR or 1Gb/10Gb Ethernet variant. When you select the

Backplane-KR variant, the Link Training (LT) and Auto Negotiation (AN) tabs appear. The 1Gb/10Gb

Ethernet variant (1G/10GbE) does not implement LT and AN parameters.
Complete the following steps to configure the 10GBASE-KR PHY IP Core:
1. Under Tools > IP Catalog, select the device family of your choice.

2. Under Tools > IP Catalog > Interface Protocols > Ethernet, select 10GBASE-KR PHY.

3. Use the tabs on the MegaWizard Plug-In Manager to select the options required for the protocol.

4. Specify 10GBASE-KR parameters. Refer to the topics listed as Related Links to understand 10GBASE-

KR parameters.

5. Click Finish to generate your parameterized 10GBASE-KR PHY IP Core.

4-4

Parameterizing the 10GBASE-KR PHY

UG-01080

2015.01.19

Altera Corporation

Backplane Ethernet 10GBASE-KR PHY IP Core with Early Access FEC Option

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