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Eyeq usage example, Eyeq usage example -19 – Altera Transceiver PHY IP Core User Manual

Page 536

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Offset

Bits

R/W

Register Name

Description

0x3

[15:4] RMW Reserved

You should not modify these bits. To update this

register, first read the value of this register then

change only the value for bits that are not

reserved.

[13] RW

1D-Eye

Writing a 1 to this bit selects 1D Eye mode and

disables vertical height measurement. Writing a 0

to this bit selects normal 2D Eye measurement

mode including both the horizontal and vertical

axes. You must use 1D Eye mode if you have

enabled DFE.

[12:3] RMW Reserved

You should not modify these bits. To update this

register, first read the value of this register then

change only the value for bits that are not

reserved.

[2]

RW

Polarity

(18)

Specifies the sign of the

Vertical height

.

When 0, the

Vertical height

is negative. When

1, the

Vertical height

is positive.

[1:0] RMW Reserved

You should not modify these bits. To update this

register, first read the value of this register then

change only the value for bits that are not

reserved.

0x5

[31:0] R

Bit Counter[31:0]

Only valid when the

BERB Enable

and

Counter

Enable

bits are set.

Bit Counter[63:0]

reports the total number of

bits received since you enabled or reset BER

counters. Each increment represents 256 bits.

0x6

[31:0] R

Bit Counter[63:32]

0x7

[31:0] R

Err Counter[31:0]

Only available when the

BERB Enable

and

Counter Enable

bits are set.

Err Counter[63:0]

reports the total number of error bits received

since you enabled or reset BER counters.

0x8

[31:0] R

Err Conter[63:32]

Refer to Changing Transceiver Settings Using Register-Based Reconfiguration for the procedures you can

use to control the Eye Monitor.

EyeQ Usage Example

This section provides an example of accessing the EyeQ registers and using the Bit Error Rate Block

(BERB).
When the BERB is enabled, the serial bit checker compares the data from CDR path and EyeQ path. The

BERB accumulates the total received bit numbers and the error bit numbers. You can use the BERB block

(18)

Writing a 1 to the

Enable Eye Monitor

register will reset the polarity to be positive.

UG-01080

2015.01.19

EyeQ Usage Example

16-19

Transceiver Reconfiguration Controller IP Core Overview

Altera Corporation

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