Altera Transceiver PHY IP Core - Manual (Page 220)

Name Value Description
Enable embedded reset
control
On/Off When On, the automatic reset controller initiates the
reset sequence for the transceiver. When Off you can
design your own reset logic using
tx_analogreset
,
rx_analogreset
,
tx_digitalreset
,
rx_digital-
reset
, and
pll_powerdown
which are top-level ports
of the Custom Transceiver PHY. You may also use
the Transceiver PHY Reset Controller' to reset the
transceivers. For more information, refer to the
Transceiver Reconfiguration Controller IP Core . By
default, the CDR circuitry is in automatic lock mode
whether you use the embedded reset controller or
design your own reset logic. You can switch the CDR
to manual mode by writing the
pma_rx_setlockto-
data
or
pma_rx_set_locktoref
registers to 1. If
either the
pma_rx_set_locktodata
and
pma_rx_
set_locktoref
is set, the CDR automatic lock mode
is disabled.
Table 9-4: Reset Mode
The CDR can be put in either manual or automatic mode. The CDR mode is controlled with the
pma_rx_set_locktodata
and
pma_rx_set_locktoref
registers. This table shows the required settings to control
the CDR mode.
rx_set_locktoref rx_set_locktodata CDR Lock Mode
1 0 Manual RX CDR locked to reference
X 1 Manual RX CDR locked to data
0 0 Automatic RX CDR
Related Information
Transceiver Reset Control in Stratix V Devices
Word Alignment Parameters
The word aligner restores word boundaries of received data based on a predefined alignment pattern. This
pattern can be 7, 8, 10, 16, 20, or 32 bits long. The word alignment module searches for a programmed
pattern to identify the correct boundary for the incoming stream.
UG-01080
2015.01.19
Word Alignment Parameters 9-7
Custom PHY IP Core Altera Corporation
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