Altera Transceiver PHY IP Core - Manual (Page 128)

Addr Bit R/W Name Description
0x94
5 RW
FD
Full-duplex mode enable for the local device. Set to 1
for full-duplex support.
6 RW
HD
Half-duplex mode enable for the local device. Set to 1
for half-duplex support. This bit should always be set
to 0.
8:7 RW
PS2,PS1
Pause support for local device. The following
encodings are defined for PS1/PS2:
• 2'b00: Pause is not supported
• 2'b0 1: Asymmetric pause toward link partner
• 2'b10: Symmetric pause
• 2'b11: Pause is supported on TX and RX
13:12 RW
RF2,RF1
Remote fault condition for local device. The following
encodings are defined for RF1/RF2:
• 2'b00: No error, link is valid (reset condition)
• 2'b0 1: Offline
• 2'b10: Failure condition
• 2'b11: Auto-negotiation error
14 RO
ACK
Acknowledge for local device. A value of 1 indicates
that the device has received three consecutive
matching ability values from its link partner.
15 RW
NP
Next page. In the device ability register, this bit is
always set to 0.
UG-01080
2015.01.19
1G/10 GbE GMII PCS Registers 5-19
1G/10 Gbps Ethernet PHY IP Core Altera Corporation
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