Altera Transceiver PHY IP Core - Manual (Page 556)

Table 16-27: Required Lines for All MIFs
Line Number Description Content Includes
0 Specifies start of the reconfiguration
MIF
Start of MIF opcode
1 Specifies the type of MIF
Type of MIF opcode
2 Specifies the reference clock
RefClk switch opcode
3 Specifies the PLL switch
CGB PLL switch opcode
Last Specifies end of reconfiguration MIF
End of MIF Opcode
The following figure provides an example of a typical MIF format; entries 3, 7, and are data records.
Figure 16-6: MIF File Format
Length = 0 0
1
2
3
4
5
6
7
8
+1
+2
+3
MIF/Quartus Version Opcode = Start of MIF
Length = 0 Input Clock Index Opcode = Input Clock Index
Length = 0 PLL Index Opcode = PLL
Length = 0 Reserved Opcode = End of MIF
Length = 3 Offset Address N
Data for Offset N
Length = 1 Offset M
Data for Offset M
Data for Offset N + 1
Data for Offset N + 2
Length = 2 Offset Address L
Data for Offset L
Data for Offset L + 1
15 11 10
..
.
..
.
5 0 4
xcvr_diffmifgen Utility
This section describes the xcvr_diffmifgen utility.
The
xcvr_diffmifgen
utility allows you to create a .mif file that includes the differences in settings
between two configurations. For example, if you have two configurations, inst0_1g_txpll0.mif that sets a
TX PLL0 bandwidth to 1 Gbps and inst0_5g_txpll0.mif that sets the TX PLL0 bandwidth to 5 Gbps, the
xcvr_diffmifgen
utility creates to_inst0_1g_txpll0.mif and to_inst0_5g_txpll0.mif that include the
UG-01080
2015.01.19
xcvr_diffmifgen Utility 16-39
Transceiver Reconfiguration Controller IP Core Overview Altera Corporation
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