1g/10gbe dynamic reconfiguration from 1g to 10gbe – Altera Transceiver PHY IP Core User Manual
Page 130
Address
Bit
R/W
Name
Description
0xA8
0
RW
tx_invpolarity
When set to 1, the TX interface inverts the polarity of the
TX data. Inverted TX data is input to the 8B/10B
encoder.
1
RW
rx_invpolarity
When set to 1, the RX channels inverts the polarity of the
received data. Inverted RX data is input to the 8B/10B
decoder.
2
RW
rx_bitreversal_enable
When set to 1, enables bit reversal on the RX interface.
The RX data is input to the word aligner.
3
RW
rx_bytereversal_
enable
When set, enables byte reversal on the RX interface. The
RX data is input to the byte deserializer.
4
RW
force_electrical_idle
When set to 1, forces the TX outputs to electrical idle.
0xA9
0
R
rx_syncstatus
When set to 1, indicates that the word aligner is
synchronized to incoming data.
1
R
rx_patterndetect
When set to 1, indicates the 1G word aligner has detected
a comma.
2
R
rx_rlv
When set to 1, indicates a run length violation.
3
R
rx_rmfifodatainserted
When set to 1, indicates the rate match FIFO inserted
code group.
4
R
rx_rmfifodatadeleted
When set to 1, indicates that rate match FIFO deleted
code group.
5
R
rx_disperr
When set to 1, indicates an RX 8B/10B disparity error.
6
R
rx_errdetect
When set to 1, indicates an RX 8B/10B error detected.
1G/10GbE Dynamic Reconfiguration from 1G to 10GbE
This topic illustrates the necessary logic to reconfigure between the 1G and 10G data rates.
The following figure illustrates the necessary modules to create a design that can dynamically change
between 1G and 10GbE operation on a channel-by-channel basis.
In this figure, the colors have the following meanings:
• Green-Altera- Cores available Quartus II IP Library, including the 1G/10Gb Ethernet MAC, the Reset
Controller, and Transceiver Reconfiguration Controller.
• Orange-Arbitration Logic Requirements Logic you must design, including the Arbiter and State
1G/10GbE PHY Arbitration Logic Requirements
PHY State Machine Logic Requirements
on page 5-23 for a description of this logic.
• White-1G and 10G settings files that you must generate. Refer to
page 5-24 for more information.
• Blue-The 1G/10GbE PHY IP core available in the Quartus II IP Library.
UG-01080
2015.01.19
1G/10GbE Dynamic Reconfiguration from 1G to 10GbE
5-21
1G/10 Gbps Ethernet PHY IP Core
Altera Corporation