Altera Transceiver PHY IP Core - Manual (Page 540)

The register-based write to turn on continuous adaptive DFE for logical channel 0 is as shown in the
following example:
Example 16-1: Register-Based Write To Turn On Adaptive DFE for Logical Channel 0
#Setting logical channel 0
write_32 0x18 0x0
#Setting DFE offset to 0x0
write_32 0x1B 0x0
#Setting data register to 3
write_32 0x1C 0x3
#Writing the data to turn on adaptive DFE
write_32 0x1A 0x1
Turning on Triggered DFE Mode
Complete the following steps to turn on triggered DFE mode:
1. Read the DFE
control and status
register busy bit (bit 8) until it is clear.
2. Write the logical channel number of the channel to be updated to the DFE
logical channel number
register.
3. Write the
DFE_offset
address of 0xB.
4. Write the data value 1'b1 or 1'b0 to the
data
register.
5. Write the
control and status
register write bit to 1'b1.
This turns on DFE power and initiates triggered DFE mode.
6. Read the DFE
control and status
register
busy
bit (bit 8) until it is clear.
7. When
busy
equals 1b’0, the Transceiver Reconfiguration Controller has updated the
logical
channel
specified in Step 2 with the data specified in Steps 3 and 4.
The register-based write to turn on the triggered DFE mode for logical channel 0 is shown in the
following example:
Example 16-2: Register-Based Write To Turn On Triggered DFE Mode for Logical Channel 0
#Setting logical channel 0
write_32 0x18 0x0
#Setting DFE offset to 0xB
write_32 0x1B 0xB
#Setting data register to 1
write_32 0x1C 0x1
#Writing the data to turn on triggered DFE
write_32 0x1A 0x1
Setting the First Tap Value Using DFE in Manual Mode
Complete the following steps to use DFE in Manual mode and set first DFE tap value to 5:
UG-01080
2015.01.19
Turning on Triggered DFE Mode 16-23
Transceiver Reconfiguration Controller IP Core Overview Altera Corporation
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