Altera Transceiver PHY IP Core - Manual (Page 648)

Loopback Mode Stratix IV Stratix V
Reverse serial loopback (pre-
and post-CDR)
On the Loopback tab of the
ALTGX MegaWizard Plug-In
Manager, select either pre-CDR
or post-CDR loopback and
regenerate the ALTGX IP core.
Update the appropriate bits of the
Transceiver Reconfiguration
Controller
tx_rx_word_offset
register to enable the pre- or post-CDR
reverse serial loopback mode. Refer to
PMA Analog Registers for more
information.
Related Information
Transceiver Reconfiguration Controller PMA Analog Control Registers on page 16-14
Differences in Dynamic Reconfiguration for Stratix IV and Stratix V
Transceivers
Dynamic reconfiguration interface is completely new in Stratix V devices. You cannot automatically
migrate a dynamic reconfiguration solution from Stratix IV to Stratix V devices.
Stratix V devices that include transceivers must use the Altera Transceiver Reconfiguration Controller
that contains the offset cancellation logic to compensate for variations due to PVT. Initially, each
transceiver channel and each TX PLL has its own parallel, dynamic reconfiguration bus, named
reconfig_from_xcvr[45:0] and reconfig_to_xcvr[69:0]. The reconfiguration bus includes Avalon-MM
signals to read and write registers and memory and test bus signals. When you instantiate a transceiver
PHY in a Stratix V device, the transceiver PHY IP core provides informational messages specifying the
number of required reconfiguration interfaces in the message pane.
Example 20-1: Informational Messages for the Transceiver Reconfiguration Interface
PHY IP will require 5 reconfiguration interfaces for connection to the
external reconfiguration controller.
Reconfiguration interface offsets 0-3 are connected to the transceiver
channels.
Reconfiguration interface offset 4 is connected to the transmit PLL.
Although you must initially create a separate reconfiguration interface for each channel and TX PLL in
your design, when the Quartus II software compiles your design, it reduces the number of reconfiguration
interfaces by merging reconfigurations interfaces. The synthesized design typically includes a reconfigura‐
tion interface for three channels. Allowing the Quartus II software to merge reconfiguration interfaces
gives the Fitter more flexibility in placing transceiver channels.
20-2 Differences in Dynamic Reconfiguration for Stratix IV and Stratix V Transceivers
UG-01080
2013.12.20
Altera Corporation Migrating from Stratix IV to Stratix V Devices Overview
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