Pma registers, Pma registers -20 – Altera Transceiver PHY IP Core User Manual
Page 129
Addr
Bit
R/W
Name
Description
0x95
5
R
FD
Full-duplex mode enable for the link partner. This bit
should always be 1 because only full duplex is
supported.
6
R
HD
Half-duplex mode enable for the link partner. A value
of 1 indicates support for half duplex. This bit should
always be 0 because half-duplex mode is not
supported.
8:7
R
PS2,PS1
Specifies pause support for link partner. The following
encodings are defined for PS1/PS2:
• 2'b00: Pause is not supported
• 2'b0 1: Asymmetric pause toward link partner
• 2'b10: Symmetric pause
• 2'b11: Pause is supported on TX and RX
13:12
R
RF2,RF1
Remote fault condition for link partner. The following
encodings are defined for RF1/RF2:
• 2'b00: No error, link is valid (reset condition)
• 2'b0 1: Offline
• 2'b10: Failure condition
• 2'b11: Auto-negotiation error
14
R
ACK
Acknowledge for link partner. A value of 1 indicates
that the device has received three consecutive
matching ability values from its link partner.
15
R
NP
Next page. In link partner register. When set to 0, the
link partner has a Next Page to send. When set to 1,
the link partner does not a Next Page. Next Page is not
supported in Auto Negotiation.
0x96
0
R
LINK_PARTNER_
AUTO_
NEGOTIATION_
ABLE
Set set to 1, indicates that the link partner supports
auto negotiation. The default value is 0.
1
R
PAGE_RECEIVE
A value of 1 indicates that a new page has been
received with new partner ability available in the
register partner ability. The default value is 0 when the
system management agent performs a read access.
PMA Registers
The PMA registers allow you to customize the TX and RX serial data interface.
5-20
PMA Registers
UG-01080
2015.01.19
Altera Corporation
1G/10 Gbps Ethernet PHY IP Core