Sdr xgmii tx interface, Sdr xgmii tx interface -12 – Altera Transceiver PHY IP Core User Manual
Page 152
For the DDR XAUI variant, the start of control character (0xFB) is aligned to either byte 0 or byte 5.
Figure 6-6: Byte 0 Start of Frame Transmission Example
tx_clk
txc[7:0]
txd[7:0]
txd[31:8]
txd[39:32]
txd[55:40]
txd[63:56]
FF
01
00
F0
FF
start FB
AAAA
AA
frame data
frame data
frame data
terminate FD
frame data
sfd AB
frame data
AAAAAA
preamble
preamble
preamble
Figure 6-7: Byte 5 Start of Frame Transmission Example
tx_clk
txc[7:0]
txd[7:0]
txd[23:8]
txd[31:24]
txd[39:32]
txd[55:40]
txd[63:56]
FF
1F
00
F8
FF
07
AA
frame data
0707
AAAA
AAAA
AA
frame data
07
sfd AB
frame data
terminate FD
start FB
frame data
frame data
frame data
preamble
preamble
preamble
preamble
preamble
Related Information
SDR XGMII TX Interface
This section describes the signals in the SDR TX XGMII interface.
6-12
SDR XGMII TX Interface
UG-01080
2015.01.19
Altera Corporation
XAUI PHY IP Core
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