Altera Transceiver PHY IP Core - Manual (Page 27)

Figure 3-3: 10GBASE-R PHY IP Core In Arria V GT Devices
Transceiver
Reconfiguration
Controller
Data
Wiring
Soft PCS
TX PMA
PMA
RX PMA & CDR
CMU
PLL
Reset
Controller
Avalon-MM Slave
Avalon-MM Master
PMA + Reset Control & Status
(Memory Map)
10-GB BaseR
CSR
Tx Serial
Rx Serial
Reconfiguration
Avalon-MM
Management
Interface
to Embedded
Controller
Control & Status
Conduits
(Optional or by
I/F Specification)
Avalon-ST
Streaming
Data
Tx Data
Rx Data
Arria V GT 10GBASE-R Top Level
Arria V GT 10GBASE-R
To/From
Transceiver
S
M
S
S
UG-01080
2015.01.19
10GBASE-R PHY IP Core 3-3
10GBASE-R PHY IP Core Altera Corporation
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