Altera Transceiver PHY IP Core User Manual
Page 670
Chapter
Document
Version
Changes Made
Arria V GZ
Transceiver Native
PHY IP Core
2.6
Made the following changes:
• Removed the description for
rx_clklow
and
rx_fref
ports from
Table 14-38: Native PHY Common Interfaces.
• Removed the ports
rx_clklow
and
rx_fref
from Figure 14-5:
Arria V GZ Native PHY Common Interfaces.
• Updated the description of
rx_10g_clk33out
clock signal in
Table 14-44: Name Dir Synchronous to tx_10g_coreclkin/rx_10g_
coreclkin Description.
• Updated the description of
tx_pma_qpipullup
,
tx_pma_
qpipulldn
, and
rx_pma_qpipulldn
signals in Table 14:38 -
Native PHY Common Interfaces.
• Updated the descriptions of
tx_cal_busy
and
rx_cal_busy
interface signals.
• Added
ext_pll_clk
signal to Figure 14-5: Common Interfaces
Ports and added its description in Table 14-38: Native PHY
Common Interfaces.
Cyclone V
Transceiver Native
PHY IP Core
2.6
Made the following changes:
• Removed the description for
rx_clklow
and
rx_fref
ports from
Table 15-15: Native PHY Common Interfaces.
• Removed the ports
rx_clklow
and
rx_fref
from Figure 15-3:
Common Interfaces Ports.
• Updated the descriptions of
tx_cal_busy
and
rx_cal_busy
interface signals.
• Added
ext_pll_clk
signal to Figure 15-3: Common Interface
Ports and added its description in Table 15-15: Native PHY
Common Interfaces.
Transceiver Reconfi‐
guration Controller
IP Core Overview
2.6
Made the following changes:
• Added a footnote for the
Polarity
register in Table 16-12: EyeQ
Offsets and Values.
• Updated the description of
Control
register in Table 16-18: ATX
PLL Tuning Offsets and Values to clarify the conditions when
tx_cal_busy
gets asserted.
• Removed
physical channel address
register description from
all the tables describing reconfiguration registers for different
blocks.
• Updated all instances of the note about undefined register bits.
• Updated the description of
tx_cal_busy
and
rx_cal_busy
interface signals.
21-10
Revision History for Previous Releases of the Transceiver PHY IP Core
UG-01080
2015.01.19
Altera Corporation
Additional Information for the Transceiver PHY IP Core