Altera Transceiver PHY IP Core User Manual
Page 396
Table 13-18: Bit Reversal and Polarity Inversion Parameters
Parameter
Range
Description
Enable TX bit reversal
On/Off
When you turn this option On, the
word aligner reverses TX parallel data
before transmitting it to the PMA for
serialization. You can only change this
static setting using the Transceiver
Reconfiguration Controller.
Enable RX bit reversal
On/Off
When you turn this option On, the
rx_
std_bitrev_ena
port controls bit
reversal of the RX parallel data after it
passes from the PMA to the PCS.
Enable RX byte reversal
On/Off
When you turn this option On, the
word aligner reverses the byte order
before transmitting data. This function
allows you to reverse the order of bytes
that were erroneously swapped. The
PCS can swap the ordering of both 8
and10 bit words.
Enable TX polarity inversion
On/Off
When you turn this option On, the
tx_
std_polinv
port controls polarity
inversion of TX parallel data before
transmitting the parallel data to the
PMA.
Enable RX polarity inversion
On/Off
When you turn this option On,
asserting
rx_std_polinv
controls
polarity inversion of RX parallel data
after PMA transmission.
Enable rx_std_bitrev_ena port
On/Off
When you turn this option On,
asserting
rx_std_bitrev_ena
control
port causes the RX data order to be
reversed from the normal order, LSB to
MSB, to the opposite, MSB to LSB.
This signal is an asynchronous input.
Enable rx_std_byterev_ena port
On/Off
When you turn this option On,
asserting
rx_std_byterev_ena
input
control port swaps the order of the
individual 8 or 10bit words received
from the PMA.
UG-01080
2015.01.19
Bit Reversal and Polarity Inversion
13-21
Arria V Transceiver Native PHY IP Core
Altera Corporation