Altera Transceiver PHY IP Core - Manual (Page 113)

PHY Module Options ALMs M20K Memory Logic Registers
1GbE/10GbE - 1GbE only
with Sequencer
400 0 700
1GbE/10GbE - 1GbE/10GbE
with 1588
1000 4 2000
1GbE/10GbE - 1GbE/10GbE
with 1588 and Sequencer
1100 4 2000
Parameterizing the 1G/10GbE PHY
The 1G/10GbE PHY IP Core is available for the Arria V GZ and Stratix V device families. The IP variant
allows you specify either the Backplane-KR or 1Gb/10Gb Ethernet variant. When you select the
Backplane-KR variant, the Link Training (LT) and Auto Negotiation (AN) tabs appear. The 1Gb/10Gb
Ethernet variant (1G/10GbE) does not implement LT and AN parameters.
Complete the following steps to configure the 1G/10GbE PHY IP Core in the MegaWizard Plug-In
Manager:
1. Under Tools > IP Catalog, select the device family of your choice.
2. Under Tools > IP Catalog > Interfaces > Ethernet select 1G10GbE and 10GBASE-KR PHY.
3. Use the tabs on the MegaWizard Plug-In Manager to select the options required for the protocol.
4. Refer to the topics listed as Related Links to understand and specify 1G/10GbE parameters:
5. Click Finish to generate your parameterized 1G/10GbE PHY IP Core.
Related Information
• Speed Detection Parameters on page 4-10
• PHY Analog Parameters on page 4-10
• 1G/10GbE PHY Interfaces on page 5-7
1GbE Parameters
The 1GbE parameters allow you to specify options for the 1GbE mode.
Table 5-4: 1Gb Ethernet Parameters
Parameter Name Options Description
Enable 1Gb Ethernet protocol On/Off When you turn this option On, the core includes
the GMII interface and related logic.
Enable SGMII bridge logic On/Off When you turn this option On, the core includes
the SGMII clock and rate adaptation logic for
the PCS. You must turn this option On if you
enable 1G mode.
5-4 Parameterizing the 1G/10GbE PHY
UG-01080
2015.01.19
Altera Corporation 1G/10 Gbps Ethernet PHY IP Core
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