Freescale Semiconductor MPC8260 - Manual (Page 977)

ATM Controller and AAL0, AAL1, and AAL5
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 30-57
30.10.2.3.3 AAL0 Protocol-Specific TCT
Figure 30-33 shows the AAL0 protocol-specific TCT.
Table 30-24 describes AAL0 protocol-specific TCT fields.
30.10.2.3.4 AAL1 CES Protocol-Specific TCT
Refer to Section 31.9.2.1, “AAL1 CES Protocol-Specific TCT.”
30.10.2.3.5 AAL2 Protocol-Specific TCT
Refer to Section 32.3.5.1, “AAL2 Protocol-Specific TCT.”
30.10.2.3.6 VBR Protocol-Specific TCTE
Figure 30-34 shows the VBR protocol-specific TCTE.
0 7 8 9 10 11 12 15
Offset + 0x10 — 0 CR10 — ACHC —
Offset + 0x12 —
Offset + 0x14
Figure 30-33. AAL0 Protocol-Specific TCT
Table 30-24. AAL0-Specific TCT Field Descriptions
Offset Bits Name Description
0x10 0–7 — Reserved, should be cleared.
8 0 Must be 0.
9 CR10 CRC-10
0 CRC10 insertion is disabled.
1 CRC10 insertion is enabled.
10 — Reserved, should be cleared.
11 ACHC ATM cell header change
0 Normal operation ATM cell header is taken from AAL0 buffer.
1 VPI/VCI (28 bits) are taken from TCT.
12–15 — Reserved, should be cleared.
0x12–0x14 — — Reserved, should be cleared.