Table 4-19. tmcntsc field descriptions, 15 time counter register (tmcnt), Time counter register (tmcnt) -44 – Freescale Semiconductor MPC8260 User Manual
Page 216: Tmcntsc field descriptions -44, Table 4-19 describes tmcntsc fields

System Interface Unit (SIU)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
4-44
Freescale Semiconductor
4.3.2.14
Time Counter Status and Control Register (TMCNTSC)
The time counter status and control register (TMCNTSC), shown in
, is used to enable the
different TMCNT functions and for reporting the source of the interrupts. The register can be read at any
time. Status bits are cleared by writing ones; writing zeros does not affect the value of a status bit.
.
describes TMCNTSC fields.
4.3.2.15
Time Counter Register (TMCNT)
The time counter register (TMCNT), shown in
, contains the current value of the time counter.
The counter is reset to zero on PORESET reset or hard reset but is not effected by soft reset.
0
7
8
9
10
11
12
13
14
15
Field
—
SEC
ALR
—
SIE
ALE
TCF
TCE
Reset
0000_0000_0000_0000
R/W
R/W
Addr
Figure 4-35. Time Counter Status and Control Register (TMCNTSC)
Table 4-19. TMCNTSC Field Descriptions
Bits
Name
Description
0–7
—
Reserved, should be cleared.
8
SEC
Once per second interrupt. This status bit is set every second and should be cleared by software.
9
ALR
Alarm interrupt. This status bit is set when the value of the TMCNT is equal to the value programmed
in the alarm register.
10–11
—
Reserved, should be cleared.
12
SIE
Second interrupt enable.
0 The time counter does not generate an interrupt when SEC is set.
1 The time counter generates an interrupt when SEC is set.
13
ALE
Alarm interrupt enable. If ALE = 1, the time counter generates an interrupt when ALR is set.
14
TCF
Time counter frequency. The input clock to the time counter may be either 4 MHz or 32 KHz. The
user should set the TCF bit according to the frequency of this clock.
0 The input clock to the time counter is 4 MHz.
1 The input clock to the time counter is 32 KHz.
See
Section 4.1.2, “Timers Clock,”
for further details.
15
TCE
Time counter enable. Is not affected by soft or hard reset.
0 The time counter is disabled.
1 The time counter is enabled.