Freescale Semiconductor MPC8260 - Manual (Page 97)

Overview
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 1-3
— Three user programmable machines, general-purpose chip-select machine, and page mode
pipeline SDRAM machine
— Byte selects for 64-bit bus width (60x) and for 32-bit bus width (local)
— Dedicated interface logic for SDRAM
• Disable CPU mode
• Communications processor module (CPM)
— Embedded 32-bit communications processor (CP) uses a RISC architecture for flexible support
for communications peripherals
— Interfaces to G2 core through on-chip dual-port RAM and DMA controller. (Dual-port RAM
size is 24 Kbyte on 0.29µm (HiP3) silicon and 32 Kbyte on 0.25µm (HiP4) silicon.)
— Serial DMA channels for receive and transmit on all serial channels
— Parallel I/O registers with open-drain and interrupt capability
— Virtual DMA functionality executing memory to memory and memory to I/O transfers
— Three fast communication controllers (FCCs) (two on the MPC8255) supporting the following
protocols
– 10/100-Mbit Ethernet/IEEE 802.3 CDMA/CS interface through media independent
interface (MII)
– ATM (not on MPC8250)—full-duplex SAR at 155 Mbps, UTOPIA interface, AAL5,
AAL1, AAL0 protocols, TM 4.0 CBR, VBR, UBR, ABR traffic types, up to 64 K external
connections
– Transparent
– HDLC—up to T3 rates (clear channel)
— Two multichannel controllers (MCCs) (only MCC2 on the MPC8250 and the MPC8255)
– Two 128 serial full-duplex data channels (for a total of 256 64 Kbps channels). Each MCC
can be split into four subgroups of 32 channels each.
– Almost any combination of subgroups can be multiplexed to single or multiple TDM
interfaces
— Four serial communications controllers (SCCs) identical to those on the MPC860, supporting
the digital portions of the following protocols:
– Ethernet/IEEE 802.3 CDMA/CS
– HDLC/SDLC and HDLC bus
– Universal asynchronous receiver transmitter (UART)
– Synchronous UART
– Binary synchronous (BiSync) communications
– Transparent
— Two serial management controllers (SMCs), identical to those of the MPC860
– Provide management for BRI devices as general-circuit interface (GCI) controllers in time-
division-multiplexed (TDM) channels