Freescale Semiconductor MC68HC908MR32 User Manual
Freescale Semiconductor Hardware
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Table of contents
Document Outline
- Revision History
- List of Chapters
- Table of Contents
- Chapter 1 General Description
- 1.1 Introduction
- 1.2 Features
- 1.3 MCU Block Diagram
- 1.4 Pin Assignments
- 1.4.1 Power Supply Pins (VDD and VSS)
- 1.4.2 Oscillator Pins (OSC1 and OSC2)
- 1.4.3 External Reset Pin (RST)
- 1.4.4 External Interrupt Pin (IRQ)
- 1.4.5 CGM Power Supply Pins (VDDA and VSSAD)
- 1.4.6 External Filter Capacitor Pin (CGMXFC)
- 1.4.7 Analog Power Supply Pins (VDDAD and VSSAD)
- 1.4.8 ADC Voltage Decoupling Capacitor Pin (VREFH)
- 1.4.9 ADC Voltage Reference Low Pin (VREFL)
- 1.4.10 Port A Input/Output (I/O) Pins (PTA7-PTA0)
- 1.4.11 Port B I/O Pins (PTB7/ATD7-PTB0/ATD0)
- 1.4.12 Port C I/O Pins (PTC6-PTC2 and PTC1/ATD9-PTC0/ATD8)
- 1.4.13 Port D Input-Only Pins (PTD6/IS3-PTD4/IS1 and PTD3/FAULT4-PTD0/FAULT1)
- 1.4.14 PWM Pins (PWM6-PWM1)
- 1.4.15 PWM Ground Pin (PWMGND)
- 1.4.16 Port E I/O Pins (PTE7/TCH3A-PTE3/TCLKA and PTE2/TCH1B-PTE0/TCLKB)
- 1.4.17 Port F I/O Pins (PTF5/TxD-PTF4/RxD and PTF3/MISO-PTF0/SPSCK)
- Chapter 2 Memory
- Chapter 3 Analog-to-Digital Converter (ADC)
- Chapter 4 Clock Generator Module (CGM)
- 4.1 Introduction
- 4.2 Features
- 4.3 Functional Description
- 4.4 I/O Signals
- 4.4.1 Crystal Amplifier Input Pin (OSC1)
- 4.4.2 Crystal Amplifier Output Pin (OSC2)
- 4.4.3 External Filter Capacitor Pin (CGMXFC)
- 4.4.4 PLL Analog Power Pin (VDDA)
- 4.4.5 Oscillator Enable Signal (SIMOSCEN)
- 4.4.6 Crystal Output Frequency Signal (CGMXCLK)
- 4.4.7 CGM Base Clock Output (CGMOUT)
- 4.4.8 CGM CPU Interrupt (CGMINT)
- 4.5 CGM Registers
- 4.6 Interrupts
- 4.7 Wait Mode
- 4.8 Acquisition/Lock Time Specifications
- Chapter 5 Configuration Register (CONFIG)
- Chapter 6 Computer Operating Properly (COP)
- Chapter 7 Central Processor Unit (CPU)
- Chapter 8 External Interrupt (IRQ)
- Chapter 9 Low-Voltage Inhibit (LVI)
- Chapter 10 Input/Output (I/O) Ports (PORTS)
- Chapter 11 Power-On Reset (POR)
- Chapter 12 Pulse-Width Modulator for Motor Control (PWMMC)
- 12.1 Introduction
- 12.2 Features
- 12.3 Timebase
- 12.4 PWM Generators
- 12.5 Output Control
- 12.6 Fault Protection
- 12.7 Initialization and the PWMEN Bit
- 12.8 PWM Operation in Wait Mode
- 12.9 Control Logic Block
- 12.9.1 PWM Counter Registers
- 12.9.2 PWM Counter Modulo Registers
- 12.9.3 PWMx Value Registers
- 12.9.4 PWM Control Register 1
- 12.9.5 PWM Control Register 2
- 12.9.6 Dead-Time Write-Once Register
- 12.9.7 PWM Disable Mapping Write-Once Register
- 12.9.8 Fault Control Register
- 12.9.9 Fault Status Register
- 12.9.10 Fault Acknowledge Register
- 12.9.11 PWM Output Control Register
- 12.10 PWM Glossary
- Chapter 13 Serial Communications Interface Module (SCI)
- Chapter 14 System Integration Module (SIM)
- Chapter 15 Serial Peripheral Interface Module (SPI)
- Chapter 16 Timer Interface A (TIMA)
- Chapter 17 Timer Interface B (TIMB)
- Chapter 18 Development Support
- Chapter 19 Electrical Specifications
- 19.1 Introduction
- 19.2 Absolute Maximum Ratings
- 19.3 Functional Operating Range
- 19.4 Thermal Characteristics
- 19.5 DC Electrical Characteristics
- 19.6 FLASH Memory Characteristics
- 19.7 Control Timing
- 19.8 Serial Peripheral Interface Characteristics
- 19.9 TImer Interface Module Characteristics
- 19.10 Clock Generation Module Component Specifications
- 19.11 CGM Operating Conditions
- 19.12 CGM Acquisition/Lock Time Specifications
- 19.13 Analog-to-Digital Converter (ADC) Characteristics
- Chapter 20 Ordering Information and Mechanical Specifications
- Appendix A MC68HC908MR16