Freescale Semiconductor MPC8260 - Manual (Page 1358)

I Part I—Overview
1 Overview
2 G2 Core
3 Memory Map
II Part II—Configuration and Reset
4 System Interface Unit (SIU)
5 Reset
III Part III—The Hardware Interface
6 External Signals
7 60x Signals
8 The 60x Bus
9 PCI Bridge
10 Clocks and Power Control
11 Memory Controller
12 Secondary (L2) Cache Support
13 IEEE 1149.1 Test Access Port
IV Part IV—Communications Processor Module
14 Communications Processor Module Overview
15 Serial Interface with Time-Slot Assigner
16 CPM Multiplexing
17 Baud-Rate Generators (BRGs)
18 Timers
19 SDMA Channels and IDMA Emulation
20 Serial Communications Controllers (SCCs)
21 SCC UART Mode
22 SCC HDLC Mode
23 SCC BISYNC Mode
24 SCC Transparent Mode
25 SCC Ethernet Mode
26 SCC AppleTalk Mode
27 Serial Management Controllers (SMCs)
28 Multi-Channel Controllers (MCCs)
29 Fast Communications Controllers (FCCs)
30 ATM Controller and AAL0, AAL1, and AAL5
31 ATM AAL1 Circuit Emulation Service
32 ATM AAL2
33 Inverse Multiplexing for ATM (IMA)
34 ATM Transmission Convergence Layer