Freescale Semiconductor MPC8260 - Manual (Page 160)

Memory Map
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
3-14 Freescale Semiconductor
0x1144C TC3 corrected cells counter (TC_CCC3) 4 R/W 16 bits 0x0000 34.4.3.4/34-12
0x1144E TC3 idle cells counter (TC_ICC3) 4 R/W 16 bits 0x0000 34.4.3.5/34-12
0x11450 TC3 transmitted cells counter (TC_TCC3) 4 R/W 16 bits 0x0000 34.4.3.2/34-12
0x11452 TC3 error cells counter (TC_ECC3) 4 R/W 16 bits 0x0000 34.4.3.3/34-12
0x11454 Reserved — 12 bytes — —
TC Layer 4
4
0x11460 TC4 mode register (TCMODE4)
4
R/W 16 bits 0x0000 34.4.1.1/34-7
0x11462 TC4 cell delineation state machine register (CDSMR4)
4
R/W 16 bits 0x0000 34.4.1.2/34-9
0x11464 TC4 event register (TCER4)
4
R/W 16 bits 0x0000 34.4.1.3/34-10
0x11466 TC4 received cells counter (TC_RCC4)
4
R/W 16 bits 0x0000 34.4.1.4/34-11
0x11468 TC4 mask register (TCMR4)
4
R/W 16 bits 0x0000 34.4.1.4/34-11
0x1146A TC4 filtered cells counter (TC_FCC4) 4 R/W 16 bits 0x0000 34.4.3.6/34-13
0x1146C TC4 corrected cells counter (TC_CCC4) 4 R/W 16 bits 0x0000 34.4.3.4/34-12
0x1146E TC4 idle cells counter (TC_ICC4) 4 R/W 16 bits 0x0000 34.4.3.5/34-12
0x11470 TC4 transmitted cells counter (TC_TCC4) 4 R/W 16 bits 0x0000 34.4.3.2/34-12
0x11472 TC4 error cells counter (TC_ECC4)
4
R/W 16 bits 0x0000 34.4.3.3/34-12
0x11474 Reserved
4
— 12 bytes — —
TC Layer 5
4
0x11480 TC5 mode register (TCMODE5)
4
R/W 16 bits 0x0000 34.4.1.1/34-7
0x11482 TC5 cell delineation state machine register (CDSMR5)
4
R/W 16 bits 0x0000 34.4.1.2/34-9
0x11484 TC5 event register (TCER5)
4
R/W 16 bits 0x0000 34.4.1.3/34-10
0x11486 TC5 received cells counter (TC_RCC5)
4
R/W 16 bits 0x0000 34.4.1.4/34-11
0x11488 TC5 mask register (TCMR5) 4 R/W 16 bits 0x0000 34.4.1.4/34-11
0x1148A TC5 filtered cells counter (TC_FCC5) 4 R/W 16 bits 0x0000 34.4.3.6/34-13
0x1148C TC5 corrected cells counter (TC_CCC5) 4 R/W 16 bits 0x0000 34.4.3.4/34-12
0x1148E TC5 idle cells counter (TC_ICC5) 4 R/W 16 bits 0x0000 34.4.3.5/34-12
0x11490 TC5 transmitted cells counter (TC_TCC5)
4
R/W 16 bits 0x0000 34.4.3.2/34-12
0x11492 TC5 error cells counter (TC_ECC5)
4
R/W 16 bits 0x0000 34.4.3.3/34-12
0x11494 Reserved — 12 bytes — —
TC Layer 6
4
0x114A0 TC6 mode register (TCMODE6)
4
R/W 16 bits 0x0000 34.4.1.1/34-7
Table 3-1. Internal Memory Map (continued)
Address
(offset)
Register R/W Size Reset Section/Page