Freescale Semiconductor MPC8260 - Manual (Page 1312)

Reference Manual (Rev 1) Errata
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
B-10 Freescale Semiconductor
30.13.2, 30-92 In Table 30-47, replace the description of TPRI, TUDC, RUDC, and UPLM with
the following (changes appear in boldface):
30.13.3. 30-94 In Table 30-48, replace the description of TIRU with the following:
30.13.4, 30-94 Add the following note at the beginning of this section:
The source clock of the internal rate timers is the BRG clock, which is configured
in CMXUAR (refer to Section 16.4.1, “CMX UTOPIA Address Register”). The
frequency of this clock must be less than one half of the FCC Tx clock of the
UTOPIA interface.
30.13.4, 30-94 Replace the first paragraph with the following (updated portion in boldface):
The first four PHY devices (address 00– 03) on FCC1 and FCC2 have their own
transmit internal rate registers (FTIRRx_PHY0–FTIRRx_PHY3) for use in
transmit internal rate mode. In this mode, the total transmission rate is determined
by FCC internal rate timers. As a master, the controller only polls the PHY’s
Clav status at the rate determined by the internal rate. As a slave, the
controller attempts to insert cells into the FIFO at the internal rate. The
controller can handle a lag of up to seven cells per PHY between the
programmable and actual bus rate. When the cell count mismatch reaches
18 TPRI Transmitter priority. Used to adjust the default priority of the FCC transmitter. It is strongly
recommended to set TPRI when in multi-PHY mode, or in single-PHY mode if the maximal
bit rate (either internal or external rate) is higher than that of the other FCCs; for other
modes, it should remain cleared.
0 Default operation
1 Prevents elevation to emergency mode
Refer to Table 14-2.
19 TUDC Transmit user-defined cells
0 Regular 53-byte cells (Disable this mode for IMA support
1
)
1 User-defined cells
20 RUDC Receive user-defined cells
0 Regular 53-byte cells (Disable this mode for IMA support
1
)
1 User-defined cells
27 UPLM UTOPIA polling mode.
0 Single Clav polling. Polling is done using Add[4–0] and Clav. Selection is done using
Add[4–0]. Up to 31 PHYs can be polled.
1 Direct polling. Polling is done using Clav[3–0]. Selection is done using Add[1–0]. Up to 4
PHYs can be polled.
30 HECC Receive HEC check
0 Do not check Rx HEC
1 Check Rx HEC. HEC errors are reported in UTOPIAE counter (see Section 30.10.7, “UNI
Statistics Table”). This option can be used only in UTIPIA 8-bit data bus size.
5 TIRU Transmit internal rate underrun. A cumulative lag of seven cells has formed between the
programmable rate and the actual rate for a specific PHY. A transmit internal rate counter expired
and a cell was not sent, either because of slow CPM performance or slow PHY performance. TIRU
may be set only when using transmit internal rate mode; see Section 30.13.4, “FCC Transmit
Internal Rate Registers (FTIRRx) (FCC1 and FCC2 Only).”