Freescale Semiconductor MPC8260 - Manual (Page 1058)

ATM AAL1 Circuit Emulation Service
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
31-42 Freescale Semiconductor
31.14 AAL1 Sequence Number (SN) Protection Table
The 32-byte sequence number protection table, pointed to by AAL1_SNPT_BASE in the ATM parameter
RAM, resides in dual-port RAM and is used for AAL1 only. The table should be initialized according to
Figure 31-31 .
9 SLIPS Slip Start.Set when an AAL1 channel enters a slip state (the channel’s adaptive
counter reaches the ATM_Stop threshold or the ATM channel loses its SYNC). At this
point the receiver drops incoming cells until the adaptive counter reaches the
ATM_Start threshold and the channel is resynchronized. See
Section 31.6,
“3-Step-SN Algorithm .”
Note that this interrupt can be masked with RCT[SLIPIM=0]. See Section 31.9.1,
“Receive Connection Table (RCT) .” This interrupt has an associated channel code.
10 CASUP CAS Update Interrupt. Set when one of the eight outgoing CAS blocks is updated by
the CP. New signaling information has been received within the received AAL1 cells.
Note that this interrupt available in CES mode and when RCT[CCASM=1] mode.
This interrupt has an associated channel code.
11 TBNR Tx buffer-not-ready. Set when a transmit buffer-not-ready interrupt is issued. This
interrupt is issued when the CP tries to open a TxBD that is not ready (R = 0). This
interrupt is sent only if TCT[BNM] = 1. This interrupt has an associated channel code.
Note that for AAL5, this interrupt is sent only if frame transmission is started. In this
case, an abort frame transmission is sent (last cell with length=0), the channel is taken
out of the APC, and the TCT[VCON] flag is cleared.
12 RXF Rx frame. RXF is set when an Rx frame interrupt is issued. This interrupt is issued at
the end of AAL5 PDU reception. This interrupt is issued only if RCT[RXFM] = 1. This
interrupt has an associated channel code.
13 BSY Busy condition. The BD table or the free buffer pool associated with this channel is busy.
Cells were discarded due to this condition. This interrupt has an associated channel
code.
14 TXB Tx buffer. TXB is set when a transmit buffer interrupt is issued. This interrupt is enabled
when both TxBD[I] and TCT[IMK] = 1. This interrupt has an associated channel code.
15 RXB Rx buffer. RXB is set when an Rx buffer interrupt is issued. This interrupt is enabled
when both RxBD[I] and RCT[RXBM] = 1. This interrupt has an associated channel
code.
0x02 — CC Channel code specifies the channel associated with this interrupt.
Table 31-13. AAL1 CES Interrupt Queue Entry Field Descriptions (continued)
Offset Bits Name Description