Freescale Semiconductor MPC8260 User Manual
Page 156
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Memory Map
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
3-10
Freescale Semiconductor
0x11030
IDMA 3 event register (IDSR3)
R/W
8 bits
0x00
0x11031
Reserved
—
24 bits
—
—
0x11034
IDMA 3 mask register (IDMR3)
R/W
8 bits
0x00
0x11035
Reserved
—
24 bits
—
—
0x11038
IDMA 4 event register (IDSR4)
R/W
8 bits
0x00
0x11039
Reserved
—
24 bits
—
—
0x1103C
IDMA 4 mask register (IDMR4)
R/W
8 bits
0x00
0x1103D–
0x112FF
Reserved
—
707
bytes
—
—
FCC1
0x11300
FCC1 general mode register (GFMR1)
R/W
32 bits
0x0000_0000
0x11304
FCC1 protocol-specific mode register (FPSMR1)
R/W
32 bits
0x0000_0000
(ATM)
(IMA)
(Ethernet)
(HDLC)
0x11308
FCC1 transmit on demand register (FTODR1)
R/W
16 bits
0x0000
0x1130A
Reserved
—
16 bits
—
—
0x1130C
FCC1 data synchronization register (FDSR1)
R/W
16 bits
0x7E7E
0x1130E
Reserved
—
16 bits
—
—
0x11310
FCC1 event register (FCCE1)
R/W
16 bits
0x0000_0000
(ATM)
(Ethernet)
(HDLC)
0x11312
Reserved
—
16 bits
—
—
0x11314
FCC1 mask register (FCCM1)
R/W
16 bits
0x0000_0000
(ATM)
(Ethernet)
(HDLC)
0x11316
Reserved
—
16 bits
—
—
0x11318
FCC1 status register (FCCS1)
R
16 bits
0x00
(HDLC)
Table 3-1. Internal Memory Map (continued)
Address
(offset)
Register
R/W
Size
Reset
Section/Page