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Freescale Semiconductor MPC8260 User Manual

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Serial Management Controllers (SMCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

27-15

Data length represents the number of octets the CP writes into the buffer. After data is received in buffer,
the CP only writes them once as the BD closes. Note that

the memory allocated for this buffer should be

no smaller than MRBLR. The Rx data buffer pointer points to the first location of the buffer and must be
even. The buffer can be in internal or external memory.

Figure 27-7

shows the UART RxBD process,

showing RxBDs after they receive 10 characters, an idle period, and five characters (one with a framing
error). The example assumes that MRBLR = 8.

12

PR

Parity error. Set when a character with a parity error is received in the last byte of the buffer. A new
buffer is used for additional data. The CP writes PR after received data is in the buffer.

13

Reserved, should be cleared.

14

OV

Overrun. Set when a receiver overrun occurs during reception. The CP writes OV after the received
data is in the buffer.

15

Reserved, should be cleared.

Table 27-7. SMC UART RxBD Field Descriptions (continued)

Bit

Name

Description