Freescale Semiconductor MPC8260 - Manual (Page 886)

Multi-Channel Controllers (MCCs)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
28-38 Freescale Semiconductor
28.8.1.1 Interrupt Circular Table Entry
Each interrupt circular table entry, shown in Figure 28-20 , contains information about channel-specific
events. The transmit circular table shows only events caused by transmission; the receive circular tables
shows only events caused by reception. The corresponding interrupt mask bits are mode-dependent; refer
to the appropriate section:
• Section 28.3.1.2 (HDLC mode)
• Section 28.3.2.2 (transparent mode)
• Section 28.3.3.1.1(AAL1 CES mode)
• Section 28.3.4.1 (SS7 mode)
Table 28-19 describes interrupt circular table fields.
13 TINT Transmit interrupt. When TINT = 1, at least one new entry in the transmit interrupt circular table was
generated by MCC. After clearing it, the user reads the next entry from the transmit interrupt circular
table and starts processing a specific channel’s exception. The user returns from the interrupt handler
when it reaches a table entry with V = 0.
14 GUN Global transmit underrun. This flag indicates whether an underrun occurred inside the MCC’s transmit
FIFO array (see
Section 28.8.1.2, “Global Transmitter Underrun (GUN) ”). The user must clear this bit.
15 GOV Global receiver overrun. This flag indicates whether an overrun occurred inside the MCC’s receive
FIFO array (see
Section 28.8.1.4, “Global Overrun (GOV) ”). The user must clear this bit.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field V W OCT
1
1 SS7 mode only. Otherwise, reserved.
SUERM
1
FISU
1
— UN TXB — AERM
1
NID IDL MRF RXF BSY RXB
— — SLIPE
2
2
Only used in conjunction with AAL1 CES.
SLIPS
2
—
R/W R/W
16 17 18 25 26 31
Field — Channel Number —
R/W R/W
Figure 28-20. Interrupt Circular Table Entry
Table 28-18. MCCE/MCCM Register Field Descriptions (continued)
Bits Name Description