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Freescale Semiconductor MPC8260 User Manual

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Fast Communications Controllers (FCCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

29-2

Freescale Semiconductor

ATM interfaces (UTOPIA); see

Chapter 15, “Serial Interface with Time-Slot Assigner,”

Chapter 35, “Fast

Ethernet Controller,

and

Chapter 30, “ATM Controller and AAL0, AAL1, and AAL5.

The FCCs are

independent from the physical interface, but FCC logic formats and manipulates data from the physical
interface. That is why the interfaces are described separately.

The FCC is described in terms of the protocol that it is chosen to run. When an FCC is programmed to a
certain protocol, it implements a certain level of functionality associated with that protocol. For most
protocols, this corresponds to portions of the link layer (layer 2 of the seven-layer OSI model). Many
functions of the FCC are common to all of the protocols. These functions are described in the FCC
description. Following that, the implementation details that differentiate protocols from one another are
discussed, beginning with the transparent protocol. Thus, the reader should read from this point to the
transparent protocol and then skip to the appropriate protocol. Since the FCCs use similar data structures
across all protocols, the reader's learning time decreases dramatically after understanding the first protocol.

Each FCC supports a number of protocols—Ethernet, HDLC/SDLC, ATM, and totally transparent
operation. Although the selected protocol usually applies to both the FCC transmitter and receiver, half of
one FCC can run transparent operation while the other runs HDLC/SDLC protocol. The internal clocks
(RCLK, TCLK) for each FCC can be programmed with either an external or internal source. The internal
clocks originate from one of the baud-rate generators or one of the external clock signals. The limitation
of the internal clocks frequency depends on the protocol being used, see

Table 29-1

. See

Chapter 15,

“Serial Interface with Time-Slot Assigner.

However, the FCC’s ability to support a sustained bit stream

depends on the protocol as well as on other factors.

Each FCC can be connected to its own set of pins on the PowerQUICC II. This configuration, the
nonmultiplexed serial interface, or NMSI, is described in

Chapter 15, “Serial Interface with Time-Slot

Assigner.

In this configuration, each FCC can support the standard modem interface signals (RTS, CTS,

and CD) through the appropriate port pins and the interrupt controller. Additional handshake signals can
be supported with additional parallel I/O lines. The FCC block diagram is shown in

Figure 29-1

.