Freescale Semiconductor MPC8260 - Manual (Page 26)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
xxiv Freescale Semiconductor
Contents
Paragraph
Number
Title
Page
Number
21.18 SCC UART Transmit Buffer Descriptor (TxBD) ........................................................ 21-18
21.19 SCC UART Event Register (SCCE) and Mask Register (SCCM) .............................. 21-19
21.20 SCC UART Status Register (SCCS)............................................................................ 21-21
21.21 SCC UART Programming Example ............................................................................ 21-22
21.22 S-Records Loader Application..................................................................................... 21-23
Chapter 22
SCC HDLC Mode
22.1 SCC HDLC Features ..................................................................................................... 22-1
22.2 SCC HDLC Channel Frame Transmission .................................................................... 22-2
22.3 SCC HDLC Channel Frame Reception ......................................................................... 22-2
22.4 SCC HDLC Parameter RAM......................................................................................... 22-3
22.5 Programming the SCC in HDLC Mode......................................................................... 22-4
22.6 SCC HDLC Commands ................................................................................................. 22-5
22.7 Handling Errors in the SCC HDLC Controller.............................................................. 22-5
22.8 HDLC Mode Register (PSMR)...................................................................................... 22-7
22.9 SCC HDLC Receive Buffer Descriptor (RxBD) ........................................................... 22-8
22.10 SCC HDLC Transmit Buffer Descriptor (TxBD)........................................................ 22-11
22.11 HDLC Event Register (SCCE)/HDLC Mask Register (SCCM) ................................. 22-12
22.12 SCC HDLC Status Register (SCCS)............................................................................ 22-14
22.13 SCC HDLC Programming Examples .......................................................................... 22-14
22.14 SCC HDLC Programming Example #1....................................................................... 22-14
22.14.1 SCC HDLC Programming Example #2................................................................... 22-16
22.15 HDLC Bus Mode with Collision Detection................................................................. 22-16
22.15.1 HDLC Bus Features................................................................................................. 22-18
22.15.2 Accessing the HDLC Bus ........................................................................................ 22-18
22.15.3 Increasing Performance ........................................................................................... 22-19
22.15.4 Delayed RTS Mode.................................................................................................. 22-20
22.15.5 Using the Time-Slot Assigner (TSA) ...................................................................... 22-21
22.15.6 HDLC Bus Protocol Programming.......................................................................... 22-22
22.15.6.1 Programming GSMR and PSMR for the HDLC Bus Protocol ........................... 22-22
22.15.6.2 HDLC Bus Controller Programming Example.................................................... 22-22
Chapter 23
SCC BISYNC Mode
23.1 Features .......................................................................................................................... 23-2
23.2 SCC BISYNC Channel Frame Transmission ................................................................ 23-2
23.3 SCC BISYNC Channel Frame Reception ..................................................................... 23-3
23.4 SCC BISYNC Parameter RAM ..................................................................................... 23-3