Freescale Semiconductor MPC8260 - Manual (Page 27)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor xxv
Contents
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Number
Title
Page
Number
23.5 SCC BISYNC Commands ............................................................................................. 23-4
23.6 SCC BISYNC Control Character Recognition .............................................................. 23-5
23.7 BISYNC SYNC Register (BSYNC).............................................................................. 23-7
23.8 SCC BISYNC DLE Register (BDLE) ........................................................................... 23-8
23.9 Sending and Receiving the Synchronization Sequence ................................................. 23-9
23.10 Handling Errors in the SCC BISYNC ........................................................................... 23-9
23.11 BISYNC Mode Register (PSMR)................................................................................ 23-10
23.12 SCC BISYNC Receive BD (RxBD) ........................................................................... 23-12
23.13 SCC BISYNC Transmit BD (TxBD)........................................................................... 23-14
23.14 BISYNC Event Register (SCCE)/BISYNC Mask Register (SCCM).......................... 23-15
23.15 SCC Status Registers (SCCS)...................................................................................... 23-16
23.16 Programming the SCC BISYNC Controller ................................................................ 23-17
23.17 SCC BISYNC Programming Example ........................................................................ 23-18
Chapter 24
SCC Transparent Mode
24.1 Features .......................................................................................................................... 24-1
24.2 SCC Transparent Channel Frame Transmission Process............................................... 24-2
24.3 SCC Transparent Channel Frame Reception Process .................................................... 24-2
24.4 Achieving Synchronization in Transparent Mode ......................................................... 24-3
24.4.1 Synchronization in NMSI Mode................................................................................ 24-3
24.4.1.1 In-Line Synchronization Pattern............................................................................ 24-3
24.4.1.2 External Synchronization Signals.......................................................................... 24-3
24.4.1.2.1 External Synchronization Example ................................................................... 24-4
24.4.1.3 Transparent Mode without Explicit Synchronization ............................................ 24-5
24.4.2 Synchronization and the TSA .................................................................................... 24-5
24.4.2.1 Inline Synchronization Pattern .............................................................................. 24-5
24.4.2.2 Inherent Synchronization....................................................................................... 24-5
24.4.3 End of Frame Detection ............................................................................................. 24-5
24.5 CRC Calculation in Transparent Mode.......................................................................... 24-6
24.6 SCC Transparent Parameter RAM................................................................................. 24-6
24.7 SCC Transparent Commands......................................................................................... 24-6
24.8 Handling Errors in the Transparent Controller .............................................................. 24-7
24.9 Transparent Mode and the PSMR .................................................................................. 24-8
24.10 SCC Transparent Receive Buffer Descriptor (RxBD) ................................................... 24-8
24.11 SCC Transparent Transmit Buffer Descriptor (TxBD)................................................ 24-10
24.12 SCC Transparent Event Register (SCCE)/Mask Register (SCCM)............................. 24-11
24.13 SCC Status Register in Transparent Mode (SCCS) ..................................................... 24-12
24.14 SCC2 Transparent Programming Example.................................................................. 24-12