Freescale Semiconductor MPC8260 User Manual
Page 1338

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Index-10
Freescale Semiconductor
G–H
Index
saving power, 29-22
switching protocols, 29-22
timing control, 29-17
TxBD, 29-9
switching protocols, 29-22
transparent mode
features list, 37-1
receive operation, 37-2
synchronization
achieving, 37-2
example, 37-3
external signals, 37-3
in-line pattern, 37-2
FCCE register
ATM, 30-90
Ethernet, 35-20
FCC overview, 29-14
HDLC, 36-14
FCCM register
ATM, 30-90
Ethernet, 35-20
FCC overview, 29-15
HDLC, 36-14
FCCS (FCC status) register, 29-15, 36-16
FCRx (function code registers), 29-13
FDSRx (FCC data synchronization registers), 29-8
Features list
Features lists
communications processor (CP), 14-4
communications processor module (CPM), 14-1
ATM controller, 30-1
parallel I/O ports, 40-1
CPM multiplexing, 16-2
Ethernet mode, 25-2
fast communications controllers (FCCs)
Fast Ethernet, 35-2
HDLC mode, 36-1
transparent mode, 37-1
2
IDMA emulation, 19-5
implementation-specific, 1-1
memory controller
features list, 11-3
new features supported, 11-1
multi-channel controllers (MCCs), 28-1
processor core, 2-3
RISC timer tables, 14-22
serial communications controllers (SCCs)
BISYNC mode, 23-2
general list, 20-2
HDLC mode, 22-1
transparent mode, 24-1
UART mode, 21-2
serial interface, 15-3
serial management controllers (SMCs)
general list, 27-2
transparent mode, 27-20
UART mode, 27-11
UART mode, features not supported, 27-10
serial peripheral interface (SPI), 38-1
timers, 18-1
Floating-point unit
FPSMR register
Ethernet, 35-18
HDLC, 36-7
protocol-specific mode, 29-7
FTIRRx (FCC transmit internal rate registers), 30-92, B-10
FTODRx (FCC transmit-on-demand registers), 29-8
G
GCI
activation and deactivation, 15-32
programming, 15-32
support, 15-30
General-purpose chip-select machine (GPCM)
common features, 11-5
differences between MPC8xx and MPC8260, 11-63
external access termination, 11-61
implementation differences with UPMs and SDRAM
interface signals, 11-52
MPC8xx versus MPC8260, 11-63
overview, 11-51
SRAM configuration, 11-52
strobe signal behavior, 11-53
terminating external accesses, 11-61
timing configuration, 11-53
General-purpose signals, 11-76
GFMR (general FCC mode register), 29-3, 30-88
GMODE (global mode entry), 30-40
GPLn (general-purpose signals), 11-76
GSMR (general SCC mode register)
AppleTalk mode, 26-3
HDLC bus protocol, programming, 22-22
overview, 20-3
H
HDLC mode