Freescale Semiconductor MPC8260 - Manual (Page 1278)

I 2 C Controller
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
39-14 Freescale Semiconductor
Table 39-10 describes I
2
C TxBD status and control bits.
0 1 2 3 4 5 6 12 13 14 15
Offset + 0 R — W I L S — NAK UN CL
Offset + 2 Data Length
Offset + 4 Tx Buffer Pointer
Offset + 6
Figure 39-14. I
2
C TxBD
Table 39-10. I
2
C TxBD Status and Control Bits
Bits Name Description
0 R Ready.
0 The buffer is not ready to be sent. This BD or its buffer can be modified. The CP clears R after
the buffer is sent or an error occurs.
1 The buffer is ready for transmission or is being sent. The BD cannot be modified once R is set.
1 — Reserved and should be cleared.
2 W Wrap (last BD in TxBD table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CP transmits data using the BD pointed to by
TBASE (top of the table). The number of BDs in this table is determined only by the W bit and
overall space constraints of the dual-port RAM.
3 I Interrupt.
0 No interrupt is generated after this buffer is serviced.
1 I2CER[TXB] or I2CER[TXE] is set when the buffer is serviced. If enabled, an interrupt occurs.
4 L Last.
0 This buffer does not contain the last character of the message.
1 This buffer contains the last character of the message. The I
2
C controller generates a stop
condition after sending this buffer.
5 S Generate start condition. Provides ability to send back-to-back frames with one I2COM[STR] trigger.
0 Do not send a start condition before the first byte of the buffer.
1 Send a start condition before the first byte of the buffer. (Used to separate frames.)
Note: If this BD is the first one in the frame when I2COM[STR] is triggered, a start condition is sent
regardless of the value of TxBD[S].
6–12 — Reserved and should be cleared.
13 NAK No acknowledge. Indicates that the transmission was aborted because the last byte sent was not
acknowledged. The I
2
C controller updates NAK after the buffer is sent.
14 UN Underrun. Indicates that the I
2
C controller encountered a transmitter underrun condition while
sending the associated buffer. The I
2
C controller updates UN after the buffer is sent.
15 CL Collision. Indicates that transmission terminated because the transmitter was lost while arbitrating
for the bus. The I
2
C controller updates CL after the buffer is sent.