Freescale Semiconductor MPC8260 - Manual (Page 847)

Serial Management Controllers (SMCs)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 27-35
the internal interrupt request to the SIU interrupt controller. Figure 27-19 displays the SMCE/SMCM
registers.
Table 27-23 describes SMCE/SMCM fields.
0 1 2 3 4 5 6 7
Field — CTXB CRXB MTXB MRXB
Reset 0000_0000
R/W R/W
Addr 0x0x11A86 (SMCE1), 0x0x11A96 (SMCE2)/ 0x0x11A8A (SMCM1), 0x0x11A9A (SMCM2)
Figure 27-19. SMC GCI Event Register (SMCE)/Mask Register (SMCM)
Table 27-23. SMCE/SMCM Field Descriptions
Bits Name Description
0–3 — Reserved, should be cleared.
4 CTXB C/I channel buffer transmitted. Set when the C/I transmit buffer is now empty.
5 CRXB C/I channel buffer received. Set when the C/I receive buffer is full.
6 MTXB Monitor channel buffer transmitted. Set when the monitor transmit buffer is now empty.
7 MRXB Monitor channel buffer received. Set when the monitor receive buffer is full.