Freescale Semiconductor MPC8260 - Manual (Page 782)

SCC Transparent Mode
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
24-12 Freescale Semiconductor
24.13 SCC Status Register in Transparent Mode (SCCS)
The SCC status register (SCCS) allows monitoring of real-time status conditions on the RXD line. The
real-time status of CTS and CD are part of the parallel I/O.
Table 24-10 describes SCCS fields.
24.14 SCC2 Transparent Programming Example
The following initialization sequence enables the transmitter and receiver, which operate independently of
each other. They implement the connection shown on PowerQUICC II(B) in
Figure 24-1 .
8 GRA Graceful stop complete. Set when a graceful stop initiated by completes as soon as the transmitter
finishes any frame in progress when the
GRACEFUL STOP TRANSMIT command was issued.
Immediately if no frame was in progress when the command was issued.
9–10 — Reserved, should be cleared. Refer to note 1 below.
11 TXE Tx error. Set when an error occurs on the transmitter channel.
12 — Reserved, should be cleared. Refer to note 1 below.
13 BSY Busy condition. Set when a byte or word is received and discarded due to a lack of buffers. The
receiver resumes reception after it gets an
ENTER HUNT MODE command.
14 TXB Tx buffer. Set no sooner than when the last bit of the last byte of the buffer begins transmission,
assuming L is set in the TxBD. If it is not, TXB is set when the last byte is written to the transmit FIFO.
15 RXB Rx buffer. Set when a complete buffer was received on the SCC channel, no sooner than two serial
clocks after the last bit of the last byte in which the buffer is received on RXD.
1
Reserved bits in the SCCE should not be masked in the SCCM register.
0 1 2 3 4 5 6 7
Field — CS —
Reset 0000_0000
R/W R
Addr 0x0x11A17 (SCCS1); 0x0x11A37 (SCCS2); 0x0x11A57 (SCCS3); 0x0x11A77 (SCCS4)
Figure 24-5. SCC Status Register in Transparent Mode (SCCS)
Table 24-10. SCCS Field Descriptions
Bit Name Description
0–5 — Reserved, should be cleared.
6 CS Carrier sense (DPLL). Shows the real-time carrier sense of the line as determined by the DPLL.
0 The DPLL does not sense a carrier.
1 The DPLL senses a carrier.
7 — Reserved, should be cleared.
Table 24-9. SCCE/SCCM Field Descriptions (continued)
1
Bit Name Description