Freescale Semiconductor MPC8260 - Manual (Page 1187)

ATM Transmission Convergence Layer
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 34-9
34.4.1.2 Cell Delineation State Machine Register [1–8] (CDSMR x)
The cell delineation state machine register (CDSMRx), as shown in Figure 34-6 , holds the ALPHA and
DELTA parameters of the cell delineation state machine.
Table 34-3 describes CDSMR fields.
10–11 LB Loopback/echo modes
00 Normal operation.
01 Cell echo mode operation. Received cells are transmitted and do not go out to the UTOPIA
bus.
10 Data loopback mode operation. Transmit data stream is connected to the receive data
stream.
11 Not used.
Note that for echo mode operation, TCMODE[SM] should be cleared, independent of the FCC
multi-PHY mode configuration.
12 TBA Tx Byte align
0 Tx data is transferred as soon as it is enabled.
1 Tx data is transferred byte aligned to the Txsyn signal.
13 IMA IMA mode
0 Rx is not in IMA.
1 Rx is in IMA mode.
14 SM Single mode
0 TC is not the only PHY on UTOPIA
1 TC is the only PHY on UTOPIA
15 CM Cell counters mode
0 Reading a cell counter clears the counter.
1 Reading a cell counter does not change the counter’s value.
0 4 5 9 10 15
Field ALPHA DELTA —
Reset 0000_0000_0000_0000
R/W R/W
Figure 34-6. Cell Delineation State Machine Register (CDSMR x)
Table 34-3. CDSMR x Field Descriptions
Bits Name Description
0-4 ALPHA ALPHA consecutive received cells with incorrect HEC are counted by the cell delineation state
machine to pass from state SYNCH to state HUNT.
5-9 DELTA DELTA consecutive received cells with correct HEC are counted by the cell delineation state
machine to pass from state PRESYNCH to state SYNCH.
10–15 — Reserved
Table 34-2. TCMODEx Field Descriptions (continued)
Bits Name Description