Freescale Semiconductor MPC8260 - Manual (Page 867)

Multi-Channel Controllers (MCCs)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 28-19
Table 28-10. Channel-Specific Parameters for SS7
Offset 1 Name 2 Width Description
0x00 TSTATE Word Tx internal state. The user must write to TSTATE 0xHH80_0000. HH is the TSTATE
High Byte. Refer to
Section 28.3.1.1, “Internal Transmitter State (TSTATE)—HDLC
Mode .”
0x04 ZISTATE Word Zero-insertion machine state. User-initialized to one of the following values:
0x10000207 for regular channel transmitting all 1s before first frame of data
0x00000207 for regular channel transmitting flags before first frame of data
0x30000207 for inverted channel transmitting all 1s before first frame of data
0x20000207 for inverted channel transmitting flags before first frame of data
Note: Used in conjunction with ZIDATA0 and ZIDATA1.
0x08 ZIDATA0 Word Zero-insertion high word data buffer. User-initialized to one of the following values:
0xFFFFFFFF allows transmission of all 1s before first frame of data
0x7E7E7E7E allows transmission of flags before first frame of data
Note: Used in conjunction with ZISTATE and ZIDATA1.
0x0C ZIDATA1 Word Zero-insertion low word data buffer. User-initialized to one of the following values:
0xFFFFFFFF allows transmission of all 1s before first frame of data
0x7E7E7E7E allows transmission of flags before first frame of data
Note: Used in conjunction with ZISTATE and ZIDATA0.
0x10 TBDFlags Hword TxBD flags, used by the CP (read-only for the user)
0x12 TBDCNT Hword Tx internal byte count. Number of remaining bytes in buffer, used by the CP
(read-only for the user)
0x14 TBDPTR Word Tx internal data pointer. Points to current absolute data address of channel, used by
the CP (read-only for the user)
0x18 ECHAMR Word Extended channel mode register. See 28.3.4.1, “Extended Channel Mode Register
(ECHAMR)—SS7 Mode .”
0x1C TCRC Word Temporary transmit CRC. Temporary value of CRC calculation result, used by the CP
(read-only for the user)
0x20 RSTATE Word Rx internal state. To start a receiver channel the user must write to RSTATE
0xHH80_0000. HH is the RSTATE High Byte. Refer to
Section 28.3.1.4, “Internal
Receiver State (RSTATE)—HDLC Mode .”
0x24 ZDSTATE Word Zero-deletion machine state (User-initialized to 0x00FFFFE0 for regular channel,
and 0x20FFFFE0 for reversed bit order channel)
0x28 ZDDATA0 Word Zero-deletion high word data buffer (User-initialized to 0xFFFFFFFF)
0x2C ZDDATA1 Word Zero-deletion low word data buffer (User-initialized to 0xFFFFFFFF)
0x30 RBDFlags Hword RxBD flags, used by the CP (read-only for the user)
0x32 RBDCNT Hword Rx internal byte count. Number of remaining bytes in buffer, used by the CP
(read-only for the user)
0x34 RBDPTR Word Rx internal data pointer. Points to current absolute data address of channel, used by
the CP (read-only for the user)