Freescale Semiconductor MPC8260 - Manual (Page 25)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor xxiii
Contents
Paragraph
Number
Title
Page
Number
20.1.3 Data Synchronization Register (DSR)....................................................................... 20-9
20.1.4 Transmit-on-Demand Register (TODR) .................................................................. 20-10
20.2 SCC Buffer Descriptors (BDs) .................................................................................... 20-10
20.3 SCC Parameter RAM................................................................................................... 20-13
20.3.1 SCC Base Addresses................................................................................................ 20-14
20.3.2 Function Code Registers (RFCR and TFCR) .......................................................... 20-15
20.3.3 Handling SCC Interrupts ......................................................................................... 20-16
20.3.4 Initializing the SCCs................................................................................................ 20-17
20.3.5 Controlling SCC Timing with RTS, CTS, and CD .................................................. 20-17
20.3.5.1 Synchronous Protocols ........................................................................................ 20-17
20.3.5.2 Asynchronous Protocols ...................................................................................... 20-20
20.3.6 Digital Phase-Locked Loop (DPLL) Operation....................................................... 20-21
20.3.6.1 Encoding Data with a DPLL................................................................................ 20-23
20.3.7 Reconfiguring the SCCs .......................................................................................... 20-24
20.3.7.1 General Reconfiguration Sequence for an SCC Transmitter............................... 20-24
20.3.7.2 Reset Sequence for an SCC Transmitter.............................................................. 20-25
20.3.7.3 General Reconfiguration Sequence for an SCC Receiver ................................... 20-25
20.3.7.4 Reset Sequence for an SCC Receiver.................................................................. 20-25
20.3.7.5 Switching Protocols ............................................................................................. 20-25
20.3.8 Saving Power ........................................................................................................... 20-25
Chapter 21
SCC UART Mode
21.1 Features .......................................................................................................................... 21-2
21.2 Normal Asynchronous Mode......................................................................................... 21-2
21.3 Synchronous Mode ........................................................................................................ 21-3
21.4 SCC UART Parameter RAM ......................................................................................... 21-3
21.5 Data-Handling Methods: Character- or Message-Based ............................................... 21-5
21.6 Error and Status Reporting............................................................................................. 21-5
21.7 SCC UART Commands ................................................................................................. 21-6
21.8 Multidrop Systems and Address Recognition ............................................................... 21-6
21.9 Receiving Control Characters ........................................................................................ 21-7
21.10 Hunt Mode (Receiver) ................................................................................................... 21-9
21.11 Inserting Control Characters into the Transmit Data Stream......................................... 21-9
21.12 Sending a Break (Transmitter)..................................................................................... 21-10
21.13 Sending a Preamble (Transmitter) ............................................................................... 21-10
21.14 Fractional Stop Bits (Transmitter) ............................................................................... 21-10
21.15 Handling Errors in the SCC UART Controller ............................................................ 21-11
21.16 UART Mode Register (PSMR).................................................................................... 21-12
21.17 SCC UART Receive Buffer Descriptor (RxBD) ......................................................... 21-14