Freescale Semiconductor MPC8260 - Manual (Page 36)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
xxxiv Freescale Semiconductor
Contents
Paragraph
Number
Title
Page
Number
30.12.2.3 UTOPIA Loop-Back Modes ................................................................................ 30-87
30.13 ATM Registers ............................................................................................................. 30-87
30.13.1 General FCC Mode Register (GFMR)..................................................................... 30-88
30.13.2 FCC Protocol-Specific Mode Register (FPSMR).................................................... 30-88
30.13.3 ATM Event Register (FCCE)/Mask Register (FCCM)............................................ 30-90
30.13.4 FCC Transmit Internal Rate Registers (FTIRRx) (FCC1 and FCC2 Only) ............ 30-91
30.14 ATM Transmit Command ............................................................................................ 30-93
30.15 SRTS Generation and Clock Recovery Using External Logic .................................... 30-94
30.16 Configuring the ATM Controller for Maximum CPM Performance ........................... 30-95
30.16.1 Using Transmit Internal Rate Mode ........................................................................ 30-95
30.16.2 APC Configuration .................................................................................................. 30-96
30.16.3 Buffer Configuration................................................................................................ 30-96
Chapter 31
ATM AAL1 Circuit Emulation Service
31.1 Features .......................................................................................................................... 31-1
31.2 AAL1 CES Transmitter Overview................................................................................. 31-3
31.2.1 Data Path.................................................................................................................... 31-3
31.2.2 Signaling Path ............................................................................................................ 31-3
31.3 AAL1 CES Receiver Overview ..................................................................................... 31-4
31.4 Interworking Functions.................................................................................................. 31-6
31.4.1 Automatic Data Forwarding ...................................................................................... 31-6
31.4.1.1 ATM-to-TDM ........................................................................................................ 31-7
31.4.1.2 TDM-to-ATM ........................................................................................................ 31-7
31.4.2 Timing Issues ............................................................................................................. 31-8
31.4.3 Clock Synchronization (SRTS, Adaptive FIFO) ....................................................... 31-9
31.4.4 Mapping TDM Time Slots to VCs............................................................................. 31-9
31.4.5 Trunk Condition....................................................................................................... 31-10
31.4.6 Channel Associated Signaling (CAS) Support ........................................................ 31-10
31.4.7 Mapping VC Signaling to CAS Blocks ................................................................... 31-11
31.4.7.1 CAS Routing Table.............................................................................................. 31-12
31.4.7.2 TDM-to-ATM CAS Support................................................................................ 31-13
31.4.7.2.1 CAS Mapping Using the Core (Optional) ....................................................... 31-14
31.4.7.3 ATM-to-TDM CAS Support................................................................................ 31-14
31.4.7.3.1 CAS Updates Using the Core (Optional) ........................................................ 31-15
31.5 ATM-to-TDM Adaptive Slip Control .......................................................................... 31-15
31.5.1 CES Adaptive Threshold Tables.............................................................................. 31-16
31.6 3-Step-SN Algorithm ................................................................................................... 31-20
31.6.1 The Three States of the Algorithm .......................................................................... 31-20
31.7 Pointer Verification Mechanism .................................................................................. 31-21