Figure 11-77. single-beat read access to edo dram, Single-beat read access to edo dram -94 – Freescale Semiconductor MPC8260 User Manual
Page 512
Memory Controller
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
11-94
Freescale Semiconductor
Figure 11-77. Single-Beat Read Access to EDO DRAM
cst1
0
0
0
0
0
Bit 0
cst2
0
0
0
0
0
Bit 1
cst3
0
0
0
0
1
Bit 2
cst4
0
0
0
0
1
Bit 3
bst1
1
1
0
0
0
Bit 4
bst2
1
0
0
0
0
Bit 5
bst3
1
0
0
0
1
Bit 6
bst4
1
0
0
0
1
Bit 7
g0l0
Bit 8
g0l1
Bit 9
g0h0
Bit 10
g0h1
Bit 11
g1t1
0
0
0
0
0
Bit 12
g1t3
0
0
0
0
1
Bit 13
g2t1
Bit 14
g2t3
Bit 15
g3t1
Bit 16
g3t3
Bit 17
g4t1
Bit 18
g4t3
Bit 19
g5t1
Bit 20
g5t3
Bit 21
redo[0]
Bit 22
redo[1]
Bit 23
loop
0
0
0
0
0
Bit 24
exen
0
0
0
0
0
Bit 25
amx0
1
0
0
0
0
Bit 26
amx1
0
0
0
0
0
Bit 27
na
0
0
0
0
0
Bit 28
uta
0
0
0
0
1
Bit
29
todt
0
0
0
0
1
Bit 30
last
0
0
0
0
1
Bit 31
RSS
RSS+1
RSS+2
RSS+3
RSS+4
CLKIN
A
RD/WR
D
PSDVAL
CS1
BS
Row
Column 1
(CAS)
(RAS)
GPL1
(OE)