Table 7-2. dp[0-7] signal assignments, 2 data bus parity (dp[0-7])-input, 8 data transfer termination signals – Freescale Semiconductor MPC8260 User Manual
Page 270: 1 transfer acknowledge (ta), 1 transfer acknowledge (ta)-input, Data bus parity (dp[0–7])—input -14, Data transfer termination signals -14, Transfer acknowledge (ta) -14, Transfer acknowledge (ta)—input -14, Dp[0–7] signal assignments -14
![Table 7-2. dp[0-7] signal assignments, 2 data bus parity (dp[0-7])-input, 8 data transfer termination signals | 1 transfer acknowledge (ta), 1 transfer acknowledge (ta)-input, Data bus parity (dp[0–7])—input -14, Data transfer termination signals -14, Transfer acknowledge (ta) -14, Transfer acknowledge (ta)—input -14, Dp[0–7] signal assignments -14 | Freescale Semiconductor MPC8260 User Manual | Page 270 / 1360](/screens/111688/270.png)
Table 7-2. dp[0-7] signal assignments, 2 data bus parity (dp[0-7])-input, 8 data transfer termination signals | 1 transfer acknowledge (ta), 1 transfer acknowledge (ta)-input, Data bus parity (dp[0–7])—input -14, Data transfer termination signals -14, Transfer acknowledge (ta) -14, Transfer acknowledge (ta)—input -14, Dp[0–7] signal assignments -14 | Freescale Semiconductor MPC8260 User Manual | Page 270 / 1360