Freescale Semiconductor MCF5480 - Manual (Page 97)

MCF548x External Signals
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 2-27
2.2.9.2 DSPI Synchronous Serial Data Input (DSPISIN)
The DSPISIN input provides the serial data to the DSPI and can be programmed to be sampled on the
rising or falling edge of DSPISCK.
2.2.9.3 DSPI Serial Clock (DSPISCK)
DSPISCK is a serial communication clock signal. In master mode, the DSPI generates the DSPISCK. In
slave mode, DSPISCK is an input from an external bus master.
2.2.9.4 DSPI Peripheral Chip Select/Slave Select (DSPICS0/SS)
In master mode, the DSPICS0 signal is a peripheral chip select output that selects which slave device the
current transmission is intended for.
In slave mode, the SS signal is a slave select input signal that allows an SPI master to select the DSPI as
the target for transmission.
2.2.9.5 DSPI Chip Selects (DSPICS[2:3])
The synchronous peripheral chip selects (DSPICS[2:3]) outputs provide DSPI peripheral chip selects that
can be programmed to be active high or low.
2.2.9.6 DSPI Peripheral Chip Select 5/Peripheral Chip Select Strobe
(DSPICS5/PCSS)
DSPICS5 is a peripheral chip select output signal. When the DSPI is in master mode and the
DMCR[PCSSE] bit is cleared, this signal is used to select which slave device the current transfer is
intended for.
PCSS provides a strobe signal that can be used with an external demultiplexer for deglitching of the
DSPICSn signals. When the DSPI is in master mode and DMCR[PCSSE] is set, the PCSS provides the
appropriate timing for the decoding of the DSPICS[0,2,3] signals which prevents glitches from occurring.
This signal is not used in slave mode.
2.2.10 FlexCAN Signals
2.2.10.1 FlexCAN Transmit (CANTX0, CANTX1)
Controller area network transmit data output.
2.2.10.2 FlexCAN Receive (CANRX0, CANRX1)
Controller area network receive data input.
2.2.11 I
2
C I/O Signals
The I
2
C serial interface module uses the signals in this section.