Freescale Semiconductor MCF5480 - Manual (Page 46)

MCF548x Reference Manual, Rev. 3
xlvi Freescale Semiconductor
EA Effective address
EDO Extended data output (DRAM)
FIFO First-in, first-out
GPIO General-purpose I/O
I
2
C Inter-integrated circuit
IEEE Institute for Electrical and Electronics Engineers
IFP Instruction fetch pipeline
IPL Interrupt priority level
JEDEC Joint Electron Device Engineering Council
JTAG Joint Test Action Group
LIFO Last-in, first-out
LRU Least recently used
LSB Least-significant byte
lsb Least-significant bit
MAC Multiple accumulate unit
MBAR Memory base address register
MSB Most-significant byte
msb Most-significant bit
Mux Multiplex
NOP No operation
OEP Operand execution pipeline
PC Program counter
PCLK Processor clock
PLL Phase-locked loop
PLRU Pseudo least recently used
POR Power-on reset
PQFP Plastic quad flat pack
RISC Reduced instruction set computing
Rx Receive
SIM System integration module
SOF Start of frame
TAP Test access port
TTL Transistor-to-transistor logic
Tx Transmit
Table ii. . Acronyms and Abbreviated Terms (continued)
Term Meaning