4 external request control register (ereqctrl), External request control register (ereqctrl) -21 – Freescale Semiconductor MCF5480 User Manual
Page 741
Memory Map/Register Definitions
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor
24-21
24.3.4.3
External Request Address Mask Register (EREQMASK)
This register contains an address mask value used for the compare that determines a hit for the external
acknowledge signal. A 0 indicates a compare and a 1 is a do not care. This address mask value can be valid
for comm bus cycles, system SRAM, external memory, or comm bus peripherals. This register can be read
or written at any time. The reset state of this register is set to all zeros.
24.3.4.4
External Request Control Register (EREQCTRL)
This register contains the control information for the external request (DREQ) and external acknowledge
(DACK) signals. This register can be read or written at any time. The reset state of this register is set to all
zeros.
31 30
29 28 27 26
25 24 23 22
21 20 19 18
17 16 15 14
13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Base Address
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0x0D00 (EREQBAR0); 0x0D10 (EREQBAR1)
Figure 24-20. External Request Base Address Register
31 30
29 28 27 26
25 24 23 22
21 20 19 18
17 16 15 14
13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Address Mask
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0x0D04 (EREQMASK0); 0x0D14 (EREQMASK1)
Figure 24-21. External Request Address Mask Register (EREQMASK)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
MD
BSEL
DACKWID
SYNC
EN
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0x0D08 (EREQCTRL0); 0x0D18 (EREQCTRL1)
Figure 24-22. External Request Control Register (EREQCTRL)