Freescale Semiconductor MCF5480 - Manual (Page 294)

MCF548x Reference Manual, Rev. 3
8-44 Freescale Semiconductor
Command Sequence:
Figure 8-40. SYNC _ PC Command Sequence
Operand Data: None
Result Data: Command complete status (0xFFFF) is returned when the register write is
complete.
8.5.3.3.10 Force Transfer Acknowledge ( FORCE _ TA )
DEBUG_D logic implements the new FORCE _ TA serial BDM command to resolve a hung bus condition.
In some system designs, references to certain unmapped memory addresses may cause the external bus to
hang with no transfer acknowledge generated by any bus responders. The FORCE _ TA forces generation of
a transfer acknowledge signal, which can be logically summed into the normal acknowledge logic located
in the system integration module (SIM) outside of the ColdFire core.
There are two scenarios of interest, one caused by a processor access and the other caused by a BDM
access. The following sequences identify the operations needed to break the hung bus condition:
• Bus hang caused by processor or external or internal alternate master:
— Assert the breakpoint input to force a processor core halt.
— If the bus hang was caused by a processor access, send in
FORCE _ TA commands until the
processor is halted, as signaled by PST = 0xF. Due to pipeline and store buffer depths, many
memory accesses may be queued up behind the access causing the bus hang. Repeated
FORCE _ TA commands eventually allow processing of all these pending accesses. As soon as the
processor is halted, the system reaches a quiescent, controllable state.
— If the hang was caused by another master, such as a DMA channel, the processor can halt
immediately. In this case as well, multiple assertions of the FORCE _ TA command may be
required to terminate the alternate master’s errant access.
• Bus hang caused by BDM access:
— It is assumed the processor is already halted at the time of the errant BDM access. To resolve
the hung bus, it is necessary to process four or more
FORCE
_
TA
commands, because the BDM
command may have initiated a cache line access that fetches 4 longwords, each needing a
unique transfer acknowledge.
Formats:
Command Sequence:
15 12 11 8 7 4 3 0
0x0 0x0 0x0 0x1
Figure 8-39. SYNC _ PC Command Format
15 12 11 8 7 4 3 0
0x0 0x0 0x0 0x2
Figure 8-41. FORCE _ TA Command
SYNC_PC
???
NEXT CMD
“CMD COMPLETE”