Freescale Semiconductor MCF5480 - Manual (Page 141)

Exception Processing Overview
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 3-37
If the exception is caused by an FPU instruction, the PC contains the address of either the next
floating-point instruction (nextFP) if the exception is pre-instruction, or the faulting instruction
(fault) if the exception is post-instruction.
3. The processor acquires the address of the first instruction of the exception handler. The instruction
address is obtained by fetching a value from the exception table at the address in the vector base
register. The index into the table is calculated as 4 x vector_number. When the index value is
generated, the vector table contents determine the address of the first instruction of the desired
handler. After the fetch of the first opcode of the handler is initiated, exception processing
terminates and normal instruction processing continues in the handler.
The vector base register described in the ColdFire Programmers Reference Manual, holds the base address
of the exception vector table in memory. The displacement of an exception vector is added to the value in
this register to access the vector table. VBR[19–0] are not implemented and are assumed to be zero, forcing
the vector table to be aligned on a 0-modulo-1-Mbyte boundary.
ColdFire processors support a 1,024-byte vector table aligned on any 0-modulo-1 Mbyte address
boundary; see Table 3-21 . The table contains 256 exception vectors, the first 64 of which are defined by
Freescale. The rest are user-defined interrupt vectors.
Table 3-21. Exception Vector Assignments
Vector Numbers Vector Offset (Hex) Stacked Program Counter
1
Assignment
0 000 — Initial supervisor stack pointer
1 004 — Initial program counter
2 008 Fault Access error
3 00C Fault Address error
4 010 Fault Illegal instruction
5 014 Fault Divide by zero
6–7 018–01C — Reserved
8 020 Fault Privilege violation
9 024 Next Trace
10 028 Fault Unimplemented line-a opcode
11 02C Fault Unimplemented line-f opcode
12 030 Next Non-PC breakpoint debug interrupt
13 034 Next PC breakpoint debug interrupt
14 038 Fault Format error
15 03C Next Uninitialized interrupt
16–23 040–05C — Reserved
24 060 Next Spurious interrupt
25–31 064–07C Next Level 1–7 autovectored interrupts
32–47 080–0BC Next Trap #0–15 instructions